MT48LC32M4A2FC-8ELIT MICRON [Micron Technology], MT48LC32M4A2FC-8ELIT Datasheet - Page 53

• Manufacturer Part Number: MT48LC32M4A2FC-8ELIT
• Description: SYNCHRONOUS DRAM
• Manufacturer: MICRON [Micron Technology]

TIMING PARAMETERS
*CAS latency indicated in parentheses.
NOTE: 1. For this example, the burst length = 4.
128Mb: x4, x8, x16 SDRAM
128MSDRAM_E.p65 – Rev. E; Pub. 1/02
DQML, DQMH
COMMAND
SYMBOL* MIN
t
t
t
t
t
t
t
t
t
t
A0-A9, A11
AH
AS
CH
CL
CK (3)
CK (2)
CKH
CKS
CMH
CMS
BA0, BA1
DQM /
CLK
CKE
A10
DQ
2. x16: A9 and A11 = “Don’t Care”
t CMS
t CKS
x8: A11 = “Don’t Care”
t AS
t AS
t AS
0.8
1.5
2.5
2.5
7.5
0.8
1.5
0.8
1.5
7
ACTIVE
BANK 0
T0
ROW
ROW
-7E
t CKH
t CMH
t AH
t AH
t AH
MAX
t RCD - BANK 0
t RAS - BANK 0
t
t
RC - BANK 0
RRD
t CK
T1
NOP
MIN
0.8
1.5
2.5
2.5
7.5
0.8
1.5
0.8
1.5
10
-75
ENABLE AUTO PRECHARGE
MAX
t CMS
ALTERNATING BANK WRITE ACCESSES
t CL
t DS
COLUMN m 2
BANK 0
WRITE
T2
D
IN
t CMH
t CH
t DH
m
MIN
10
1
2
3
3
8
1
2
1
2
-8E
t DS
D
MAX
IN
T3
NOP
m + 1
t DH
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t DS
D
ACTIVE
BANK 1
IN
T4
ROW
ROW
m + 2
t DH
53
t RCD - BANK 1
t DS
SYMBOL* MIN
t
t
t
t
t
t
t
t
DH
DS
RAS
RC
RCD
RP
RRD
WR
D
IN
T5
NOP
m + 3
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t DH
t WR - BANK 0
ENABLE AUTO PRECHARGE
1 CLK +
t DS
7ns
COLUMN b 2
0.8
1.5
37
60
15
15
14
BANK 1
WRITE
T6
D
IN
-7E
t DH
b
120,000
MAX
128Mb: x4, x8, x16
t DS
1
t RP - BANK 0
D
1 CLK +
NOP
IN
7.5ns
T7
MIN
0.8
1.5
44
66
20
20
15
b + 1
t DH
-75
120,000
MAX
t DS
D
IN
NOP
T8
b + 2
1 CLK +
t DH
MIN
7ns
50
70
20
20
20
1
2
©2001, Micron Technology, Inc.
SDRAM
-8E
t DS
120,000
D
MAX
BANK 0
ACTIVE
T9
IN
ROW
ROW
b + 3
t
t
RCD - BANK 0
WR - BANK 1
DON’T CARE
t DH
UNITS
ns
ns
ns
ns
ns
ns
ns
–