MT48LC32M4A2FC-8ELIT MICRON [Micron Technology], MT48LC32M4A2FC-8ELIT Datasheet - Page 43

• Manufacturer Part Number: MT48LC32M4A2FC-8ELIT
• Description: SYNCHRONOUS DRAM
• Manufacturer: MICRON [Micron Technology]

DQML, DQMH
TIMING PARAMETERS
NOTE: 1. For this example, the burst length = 4, and the CAS latency = 2.
128Mb: x4, x8, x16 SDRAM
128MSDRAM_E.p65 – Rev. E; Pub. 1/02
*CAS latency indicated in parentheses.
SYMBOL* MIN
t
t
t
t
t
t
t
t
t
t
COMMAND
A0-A9, A11
AC (3)
AC (2)
AH
AS
CH
CL
CK (3)
CK (2)
CKH
CKS
BA0, BA1
DQM /
CKE
CLK
A10
DQ
2. x16: A9 and A11 = “Don’t Care”
x8: A11 = “Don’t Care”
t CKS
t CMS
0.8
1.5
2.5
2.5
7.5
0.8
1.5
t AS
t AS
t AS
7
ACTIVE
T0
ROW
ROW
BANK
-7E
t CMH
t CKH
t AH
t AH
t AH
MAX
5.4
5.4
t RCD
t RAS
t RC
t CK
MIN
0.8
1.5
2.5
2.5
7.5
0.8
1.5
10
T1
NOP
-75
MAX
ENABLE AUTO PRECHARGE
5.4
6
t CMS
t CL
COLUMN m 2
READ – WITH AUTO PRECHARGE
BANK
T2
READ
MIN
10
1
2
3
3
8
1
2
t CMH
t CH
-8E
CAS Latency
MAX
6
6
T3
NOP
t LZ
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t AC
43
T4
D
NOP
OUT
t OH
t AC
m
SYMBOL* MIN
t
t
t
t
t
t
t
t
t
t
CMH
CMS
HZ(3)
HZ(2)
LZ
OH
RAS
RC
RCD
RP
Micron Technology, Inc., reserves the right to change products or specifications without notice.
D
T5
OUT
NOP
m + 1
t OH
0.8
1.5
37
60
15
15
t AC
1
3
-7E
120,000
MAX
5.4
5.4
1
D
T6
OUT
NOP
128Mb: x4, x8, x16
m + 2
t OH
t AC
t RP
MIN
0.8
1.5
44
66
20
20
1
3
-75
120,000
MAX
D
5.4
T7
OUT
NOP
6
m + 3
t OH
t HZ
MIN
50
70
20
20
1
2
1
3
©2001, Micron Technology, Inc.
SDRAM
-8E
120,000
T8
ROW
BANK
ACTIVE
ROW
DON’T CARE
UNDEFINED
MAX
6
6
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns