h8s-2646 Renesas Electronics Corporation., h8s-2646 Datasheet - Page 234

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h8s-2646

Manufacturer Part Number
h8s-2646
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 8 Data Transfer Controller (DTC)
Table 8.9
The number of execution states is calculated from the formula below. Note that Σ means the sum
of all transfers activated by one activation event (the number in which the CHNE bit is set to 1,
plus 1).
For example, when the DTC vector address table is located in on-chip ROM, normal mode is set,
and data is transferred from the on-chip ROM to an internal I/O register, the time required for the
DTC operation is 14 states. The time from activation to the end of the data write is 11 states.
Rev. 5.00 Sep 22, 2005 page 208 of 1136
REJ09B0257-0500
Bus width
Access states
Execution
status
Object to be Accessed
Number of execution states = I · (S
Vector read
Register
information
read/write
Byte data read
Word data read
Byte data write
Word data write
Internal operation S
Number of States Required for Each Execution Status
S
S
S
S
S
S
I
J
K
K
L
L
M
Chip
RAM
On-
32
1
1
1
1
1
1
1
I
+1) + Σ (J · S
ROM
Chip
On-
16
1
1
1
1
1
1
1
On-Chip I/O
Registers
8
2
2
4
2
4
1
J
+ K · S
16
2
2
2
2
2
1
K
+ L · S
8
2
4
2
4
2
4
1
External Devices
L
) + M · S
6+2m
6+2m
6+2m
3+m
3+m
8
3
1
M
16
2
2
2
2
2
2
1
3+m
3+m
3+m
3+m
3+m
16
3
1

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