h8s-2646 Renesas Electronics Corporation., h8s-2646 Datasheet - Page 12

• Manufacturer Part Number: h8s-2646
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

6.2
6.3
Section 7 Bus Controller
7.1
7.2
7.3
7.4
7.5
Rev. 5.00 Sep 22, 2005 page xii of xxvi
Register Descriptions........................................................................................................ 129
6.2.1
6.2.2
6.2.3
6.2.4
6.2.5
Operation .......................................................................................................................... 133
6.3.1
6.3.2
6.3.3
6.3.4
6.3.5
6.3.6
6.3.7
Overview .......................................................................................................................... 139
7.1.1
7.1.2
7.1.3
7.1.4
Register Descriptions........................................................................................................ 142
7.2.1
7.2.2
7.2.3
7.2.4
7.2.5
7.2.6
Overview of Bus Control.................................................................................................. 153
7.3.1
7.3.2
7.3.3
7.3.4
Basic Bus Interface ........................................................................................................... 157
7.4.1
7.4.2
7.4.3
7.4.4
7.4.5
Burst ROM Interface ........................................................................................................ 170
7.5.1
Break Address Register A (BARA)..................................................................... 129
Break Address Register B (BARB) ..................................................................... 130
Break Control Register A (BCRA) ...................................................................... 130
Break Control Register B (BCRB) ...................................................................... 132
Module Stop Control Register C (MSTPCRC).................................................... 132
PC Break Interrupt Due to Instruction Fetch ....................................................... 133
PC Break Interrupt Due to Data Access .............................................................. 134
Notes on PC Break Interrupt Handling................................................................ 134
Operation in Transitions to Power-Down Modes ................................................ 135
PC Break Operation in Continuous Data Transfer............................................... 136
When Instruction Execution is Delayed by One State ......................................... 137
Additional Notes.................................................................................................. 138
Features................................................................................................................ 139
Block Diagram..................................................................................................... 140
Pin Configuration ................................................................................................ 141
Register Configuration......................................................................................... 141
Bus Width Control Register (ABWCR) .............................................................. 142
Access State Control Register (ASTCR) ............................................................. 143
Wait Control Registers H and L (WCRH, WCRL) ............................................. 144
Bus Control Register H (BCRH) ......................................................................... 148
Bus Control Register L (BCRL) .......................................................................... 150
Pin Function Control Register (PFCR) ................................................................ 151
Area Partitioning.................................................................................................. 153
Bus Specifications ............................................................................................... 154
Memory Interfaces............................................................................................... 155
Interface Specifications for Each Area ................................................................ 156
Overview ............................................................................................................. 157
Data Size and Data Alignment............................................................................. 157
Valid Strobes ....................................................................................................... 159
Basic Timing........................................................................................................ 160
Wait Control ........................................................................................................ 168
Overview ............................................................................................................. 170
................................................................................................... 139