h8s-2646 Renesas Electronics Corporation., h8s-2646 Datasheet - Page 201

• Manufacturer Part Number: h8s-2646
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

(3) Relationship between Chip Select (CS
Depending on the system’s load conditions, the RD signal may lag behind the CS signal * . An
example is shown in figure 7.17.
In this case, with the setting for no idle cycle insertion (a), there may be a period of overlap
between the bus cycle A RD signal and the bus cycle B CS signal.
Setting idle cycle insertion, as in (b), however, will prevent any overlap between the RD and CS
signals.
In the initial state after reset release, idle cycle insertion (b) is set.
Note: * The CS signal is generated externally rather than inside the LSI device.
CS * (area A)
CS * (area B)
Note: * The CS signal is generated externally rather than inside the LSI device.
Address bus
Data bus
HWR
RD
Figure 7.17 Relationship between Chip Select (CS
(a) Idle cycle not inserted
T
1
Bus cycle A
(ICIS0 = 0)
T
2
T
floating time
Long output
3
Bus cycle B
T
1
T
2
CS
CS
CS * ) Signal and Read (RD
Data
collision
CS * (area A)
CS * (area B)
Address bus
Data bus
HWR
Rev. 5.00 Sep 22, 2005 page 175 of 1136
RD
CS
CS) * and Read (RD
CS
T
(b) Idle cycle inserted
1
RD
RD
RD) Signal
Bus cycle A
(Initial value ICIS0 = 1)
T
2
Section 7 Bus Controller
T
3
REJ09B0257-0500
T
RD
RD)
RD
I
Bus cycle B
T
1
T
2