h8s-2646 Renesas Electronics Corporation., h8s-2646 Datasheet - Page 17

• Manufacturer Part Number: h8s-2646
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

11.4 Usage Notes ...................................................................................................................... 417
Section 12 Watchdog Timer
12.1 Overview .......................................................................................................................... 419
12.2 Register Descriptions........................................................................................................ 422
12.3 Operation .......................................................................................................................... 431
12.4 Interrupts........................................................................................................................... 435
12.5 Usage Notes ...................................................................................................................... 435
Section 13 Serial Communication Interface (SCI)
13.1 Overview .......................................................................................................................... 437
13.2 Register Descriptions........................................................................................................ 442
11.3.1 Overview ............................................................................................................. 408
11.3.2 Output Timing ..................................................................................................... 409
11.3.3 Normal Pulse Output ........................................................................................... 410
11.3.4 Non-Overlapping Pulse Output ........................................................................... 412
11.3.5 Inverted Pulse Output .......................................................................................... 415
11.3.6 Pulse Output Triggered by Input Capture............................................................ 416
12.1.1 Features................................................................................................................ 419
12.1.2 Block Diagram..................................................................................................... 420
12.1.3 Pin Configuration ................................................................................................ 421
12.1.4 Register Configuration......................................................................................... 421
12.2.1 Timer Counter (TCNT)........................................................................................ 422
12.2.2 Timer Control/Status Register (TCSR)................................................................ 423
12.2.3 Reset Control/Status Register (RSTCSR)............................................................ 427
12.2.4 Notes on Register Access .................................................................................... 429
12.3.1 Watchdog Timer Operation ................................................................................. 431
12.3.2 Interval Timer Operation ..................................................................................... 432
12.3.3 Timing of Setting Overflow Flag (OVF) ............................................................. 433
12.3.4 Timing of Setting of Watchdog Timer Overflow Flag (WOVF) ......................... 434
12.5.1 Contention between Timer Counter (TCNT) Write and Increment..................... 435
12.5.2 Changing Value of PSS and CKS2 to CKS0 ....................................................... 436
12.5.3 Switching between Watchdog Timer Mode and Interval Timer Mode ............... 436
12.5.4 Internal Reset in Watchdog Timer Mode............................................................. 436
12.5.5 OVF Flag Clearing in Interval Timer Mode ........................................................ 436
13.1.1 Features................................................................................................................ 437
13.1.2 Block Diagram..................................................................................................... 439
13.1.3 Pin Configuration ................................................................................................ 440
13.1.4 Register Configuration......................................................................................... 441
13.2.1 Receive Shift Register (RSR) .............................................................................. 442
13.2.2 Receive Data Register (RDR).............................................................................. 442
............................................................................................. 419
Rev. 5.00 Sep 22, 2005 page xvii of xxvi
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