or3l165b Lattice Semiconductor Corp., or3l165b Datasheet - Page 37

• Manufacturer Part Number: or3l165b
• Description: Orca Or3lxxxb Series Field-programmable Gate Arrays
• Manufacturer: Lattice Semiconductor Corp.

Data Addendum
March 2002
Lattice Semiconductor
Estimating Power Dissipation
OR3LxxxB
The total operating power dissipated is estimated by
adding the standby (I
power dissipated. The internal and external power is
the power consumed in the PLCs and PICs, respec-
tively. In general, the standby power is small and may
be neglected. The total operating power is as follows:
The internal operating power is made up of two parts:
clock generation and PFU output power. The PFU out-
put power can be estimated based upon the number of
PFU outputs switching when driving an average fan-out
of two:
For each PFU output that switches, 0.136 mW/MHz
needs to be multiplied times the frequency (in MHz)
that the output switches. Generally, this can be esti-
mated by using one-half the clock rate, multiplied by
some activity factor; for example, 20%.
The power dissipated by the clock generation circuitry
is based upon four parts: the fixed clock power, the
power/clock branch row or column, the clock power dis-
sipated in each PFU that uses this particular clock, and
the power from the subset of those PFUs that are con-
figured as synchronous memory. Therefore, the clock
power can be calculated for the four parts using the fol-
lowing equations.
P
P
PFU
T
= Σ P
DDSB
= 0.078 mW/MHz
PLC
), internal, and external
+ Σ P
PIC
OR3L165B Clock Power
P
For a quick estimate, the worst-case (typical circuit)
OR3L165B clock power = 9.8 mW/MHz
OR3L225B Clock Power
P
For a quick estimate, the worst-case (typical circuit)
OR3L225B clock power = 13.5 mW/MHz
The power dissipated in a PIC is the sum of the power
dissipated in the four PIOs in the PIC. This consists of
power dissipated by inputs and ac power dissipated by
outputs. The power dissipated in each PIO depends on
whether it is configured as an input, output, or input/
output. If a PIO is operating as an output, then there is
a power dissipation component for P
P
input.
The power dissipated by an input buffer is (V
V
The ac power dissipation from an output or bidirec-
tional is estimated by the following:
where the unit for C
OUT
DD
–
. This is because the output feeds back to the
0.3 V or higher) estimated as:
= [0.039 mW/MHz
+ (0.046 mW/MHz/Branch) (# Branches)
+ (0.008 mW/MHz/PFU) (# PFUs)
+ (0.002 mW/MHz/PIO (# PIOs)]
= [0.045 mW/MHz
+ (0.053 mW/MHz/Branch) (# Branches)
+ (0.008 mW/MHz/PFU) (# PFUs)
+ (0.002 mW/MHz/PIO (# PIOs)]
P
OUT
ORCA OR3LxxxB Series FPGAs
= (C
P
L
IN
L
+ 8.8 pF)
= 0.09 mW/MHz
is farads, and the unit for F is Hz.
×
V
DD 2
IN
×
, as well as
F Watts
IH =
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