or3l165b Lattice Semiconductor Corp., or3l165b Datasheet - Page 20
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or3l165b
Manufacturer Part Number
or3l165b
Description
Orca Or3lxxxb Series Field-programmable Gate Arrays
Manufacturer
Lattice Semiconductor Corp.
Datasheet
1.OR3L165B.pdf
(88 pages)
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ORCA OR3LxxxB Series FPGAs
Timing Characteristics
PIO Timing.
Table 12. Programmable I/O Timing Characteristics
OR3LxxB Commercial: V
to 3.6 V, V
Note: The delays for all input buffers assume an input rise/fall time of <1 V/ns.
20
Input Delays (T
INREGED_HLD
INREGED_SET
LATCHD_DEL
INREGD_SET
INREGE_HLD
INREGD_HLD
INREGE_SET
INLTCH_DEL
INLSRL_DEL
LATCH_DEL
INREG_SET
INREG_HLD
INREG_DEL
INGSR_DEL
INLSR_SET
INLSR_HLD
INLSR_DEL
INCE_HLD
CKIN_DEL
INCE_SET
IND_DEL
Symbol
IN_DEL
IN_FAL
IN_RIS
DD
2 = 2.38 V to 2.63 V, –40 °C
J
= 85 °C, V
Input Rise Time
Input Fall Time
PIO Direct Delays:
PIO Transparent Latch Delays:
Input Latch/FF Setup Timing:
Input FF/Latch Hold Timing:
Clock-to-in Delay (FF CLK to IN1, IN2)
Pad to In (pad to CLK IN)
Pad to In (pad to IN1, IN2)
Pad to In Delayed (pad to IN1, IN2)
Pad to In (pad to IN1, IN2)
Pad to In Delayed (pad to IN1, IN2)
Pad to ExpressCLK (fast-capture latch/FF)
Pad Delayed to ExpressCLK
Pad to Clock (input latch/FF)
Pad Delayed to Clock (input latch/FF)
Clock Enable to Clock (CE to CLK)
Local Set/Reset (sync) to Clock (LSR to CLK)
Pad from ExpressCLK (fast-capture latch/FF)
Pad Delayed from ExpressCLK
Pad from Clock (input latch/FF)
Pad Delayed from Clock (input latch/FF)
Clock Enable from Clock (CE from CLK)
Local Set/Reset (sync) from Clock
Clock-to-in Delay (latch CLK to IN1, IN2)
Local S/R (async) to IN (LSR to IN1, IN2)
Local S/R (async) to IN (LSR to IN1, IN2) Latch/FF in
Global S/R to In (GSRN to IN1, IN2)
(fast-capture latch/FF)
(fast-capture latch/FF)
(LSR from CLK)
Latch Mode
DD
= 3.0 V to 3.6 V, V
DD
= min, V
(continued)
DD
<
2 = min)
Parameter
T
A
DD
<
+85 °C.
2 = 2.38 V to 2.63 V, 0 °C
<
T
14.53
10.90
A
4.54
0.65
0.92
0.81
Min
0.0
0.0
0.0
0.0
0.0
0.0
—
—
—
—
—
—
—
—
—
—
—
—
<
70 °C; Industrial: V
-7
11.55
12.46
Max
0.77
1.35
2.79
1.94
1.94
2.95
2.64
2.69
575
575
—
—
—
—
—
—
—
—
—
—
—
—
Lattice Semiconductor
11.63
2.62
0.46
9.50
0.82
0.73
Min
Data Addendum
0.0
0.0
0.0
0.0
0.0
0.0
—
—
—
—
—
—
—
—
—
—
—
—
-8
March 2002
10.87
Max
0.55
1.07
9.89
2.42
1.68
1.68
2.55
2.30
2.34
DD
500
500
—
—
—
—
—
—
—
—
—
—
—
—
= 3.0 V
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns