or3l165b Lattice Semiconductor Corp., or3l165b Datasheet - Page 22
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or3l165b
Manufacturer Part Number
or3l165b
Description
Orca Or3lxxxb Series Field-programmable Gate Arrays
Manufacturer
Lattice Semiconductor Corp.
Datasheet
1.OR3L165B.pdf
(88 pages)
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ORCA OR3LxxxB Series FPGAs
Timing Characteristics
Table 12. Programmable I/O Timing Characteristics (continued)
OR3LxxB Commercial: V
to 3.6 V, V
Note: The delays for all input buffers assume an input rise/fall time of <1 V/ns.
22
PIO Logic Block Delays
3-State FF Delays
TSGSRSL_DEL
TSREGSL_DEL
TSLSRSL_DEL
TSGSRSI_DEL
TSREGSI_DEL
TSLSRSI_DEL
OUTRSL_DEL
OUTCSL_DEL
TSGSRF_DEL
TSREGF_DEL
OUTLSL_DEL
OUTRSI_DEL
OUTCSI_DEL
TSLSRF_DEL
OUTLSI_DEL
OUTRF_DEL
OUTCF_DEL
OUTLF_DEL
TSLSR_HLD
TSLSR_SET
TSSL_DEL
TSSI_DEL
TSE_HLD
TSF_DEL
TSE_SET
TS_SET
TS_HLD
Symbol
DD
2 = 2.38 V to 2.63 V, –40 °C
Out to Pad (OUT[2:1] via logic to pad):
Outreg to Pad (OUTREG via logic to pad):
Clock to Pad (ECLK, CLK via logic to pad):
3-state Enable/Disable Delay (TS direct to pad):
Local Set/Reset (async) to Pad (LSR to pad):
Global Set/Reset to Pad (GSRN to pad):
3-State FF Setup Timing:
3-State FF Hold Timing:
Clock to Pad Delay (ECLK, SCLK to pad):
Fast
Slewlim
Sinklim
Fast
Slewlim
Sinklim
Slewlim
Sinklim
Slewlim
Sinklim
Slewlim
Sinklim
Slewlim
Sinklim
Slewlim
Sinklim
Fast
Fast
Fast
Fast
TS to ExpressCLK (TS to ECLK)
TS to Clock (TS to CLK)
Local Set/Reset (sync) to Clock (LSR to CLK)
TS from ExpressCLK (TS from ECLK)
TS from Clock (TS from CLK)
Local Set/Reset (sync) from Clock
Fast
(LSR from CLK)
DD
= 3.0 V to 3.6 V, V
(continued)
Parameter
<
T
A
DD
<
+85 °C.
2 = 2.38 V to 2.63 V, 0 °C
0.34
0.34
Min
0.0
0.0
0.0
0.0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
-7
<
10.14
11.05
10.92
10.24
11.51
10.20
10.48
Max
3.79
4.71
4.67
5.55
4.54
5.44
3.86
4.66
5.13
5.93
4.65
5.35
4.09
4.90
T
—
—
—
—
—
—
A
<
70 °C; Industrial: V
0.30
0.30
Min
0.0
0.0
0.0
0.0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
-8
10.01
Max
3.21
3.91
8.84
4.02
4.72
9.64
3.90
4.60
9.53
3.29
3.99
8.92
4.38
5.08
4.28
4.98
9.91
3.49
4.19
9.12
—
—
—
—
—
—
Lattice Semiconductor
Data Addendum
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
March 2002
DD
= 3.0 V