mc9s12xf512 Freescale Semiconductor, Inc, mc9s12xf512 Datasheet - Page 951
mc9s12xf512
Manufacturer Part Number
mc9s12xf512
Description
S12x Microcontrollers 16-bit Automotive Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S12XF512.pdf
(1306 pages)
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operation with current-status correction selected, PWM value registers one, three, and five control the
outputs for the first PWM cycle.
Setting PWMEN for the first time after reset without first setting LDOK loads a prescaler divisor of one,
a PWM value of $0000, and an unknown modulus.
The PWM generator uses the last values loaded if PWMEN is cleared and then set while LDOK equals
zero.
Initializing the deadtime register, after setting PWMEN or OUTCTLx, can cause an improper deadtime
insertion. However, the deadtime can never be shorter than the specified value.
When the PWMEN bit is cleared:
20.4.8
Fault protection can disable any combination of PWM pins. Faults are generated by a logic one on any of
the FAULT pins. Each FAULT pin can be mapped arbitrarily to any of the PWM pins.
Freescale Semiconductor
PWMEN
PWMEN
CLOCK
CLOCK
•
•
•
•
•
•
•
IPBus
IPBus
PWM
PINS
PWM
PINS
BIT
BIT
The PWMx outputs will be tri-stated unless OUTCTLx = 1
The PWM counter is cleared and does not count
The PWM generator forces its outputs to zero
The PWMRF flag and pending CPU interrupt requests are not cleared
All fault circuitry remains active unless FPINEx = 0
Software output control remains active
Deadtime insertion continues during software output control
Fault Protection
Even if LDOK is not set, setting PWMEN also sets the PWMRF flag. To
prevent a CPU interrupt request, clear the PWMRIE bit before setting
PWMEN.
HI-Z
Figure 20-75. PWMEN and PWM Pins in Complementary Operation
HI-Z
Figure 20-74. PWMEN and PWM Pins in Independent Operation
MC9S12XF - Family Reference Manual, Rev.1.19
Chapter 20 Pulse Width Modulator with Fault Protection (PMF15B6C) Module
NOTE
ACTIVE
ACTIVE
HI-Z
HI-Z
951
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