mc9s12xf512 Freescale Semiconductor, Inc, mc9s12xf512 Datasheet - Page 451

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mc9s12xf512

Manufacturer Part Number
mc9s12xf512
Description
S12x Microcontrollers 16-bit Automotive Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Read: Anytime
Write: Anytime
Writing the CGMREFDV register clears the LOCK status bit.
The REFFRQ[1:0] bit are used to configure the internal PLL filter for optimal stability and lock time. For
correct IPLL operation the REFFRQ[1:0] bits have to be selected according to the actual REFCLK
frequency as shown in
IPLL (no locking and/or insufficient stability).
12.3.2.3
This register provides CGMIPLL status bits and flags.
Read: Anytime
Write: Refer to each bit for individual write conditions
Freescale Semiconductor
Module Base + 0x0001
Module Base + 0x0003
Reset
Reset
W
W
R
R
f REF
LOCKIE
CGMIPLL Flags Register (CGMFLG)
0
0
7
7
=
REFFRQ[1:0]
------------------------------------
(
REFDIV
f OSC
= Unimplemented or Reserved
Figure 12-4. CGMIPLL Reference Divider Register (CGMREFDV)
Figure
0
0
0
6
+
6
1
Table 12-2. Reference Clock Frequency Selection
Figure 12-5. CGMIPLL Flags Register (CGMFLG)
)
12-2. Setting the REFFRQ[1:0] bits wrong can result in a non functional
REFCLK Frequency Ranges
MC9S12XF - Family Reference Manual, Rev.1.19
1MHz <= f
6MHz < f
2MHz < f
0
0
0
5
f
5
REF
REF
REF
>12MHz
REF
Chapter 12 Clock Generation Module using IPLL (CGMIPLL) Block Description
<= 12MHz
<= 6MHz
<= 2MHz
LOCKIF
0
0
4
4
LOCK
0
0
3
3
REFFRQ[1:0]
REFDIV[5:0]
00
01
10
11
0
0
0
2
2
0
0
0
1
1
UNLOCKF
0
0
0
0
451

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