mc9s12xf512 Freescale Semiconductor, Inc, mc9s12xf512 Datasheet - Page 832
mc9s12xf512
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mc9s12xf512
Description
S12x Microcontrollers 16-bit Automotive Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S12XF512.pdf
(1306 pages)
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Chapter 18 External Bus Interface (S12XEBIV4)
The timing diagram for this operation is shown in:
The associated timing numbers are given in:
Timing considerations:
18.5.2.2
This mode is used for emulation systems in which the target application is operating in normal expanded
mode.
If the external bus is used with a PRU, the external device rebuilds the data select and data direction signals
UDS, LDS, RE, and WE from the ADDR0, LSTRB, and RW signals.
Figure 18-6
832
•
•
•
•
•
•
Figure ‘Example 2a: Emulation Single-Chip Mode — Read Followed by Write’
Table ‘Example 2a: Emulation Single-Chip Mode Timing (EWAIT disabled)’
Signals muxed with address lines ADDRx, i.e., IVDx, IQSTATx and ACCx, have the same timing.
LSTRB has the same timing as RW.
ECLKX2 rising edges have the same timing as ECLK edges.
The timing for accesses to PRU registers, which take 2 cycles to complete, is the same as the timing
for an external non-PRR access with 1 cycle of stretch as shown in example 2b.
shows the PRU connection with the available external bus signals in an emulator application.
Example 2b: Emulation Expanded Mode
Figure 18-5. Application in Emulation Single-Chip Mode
ADDR[22:20]/ACC[2:0]
ADDR[22:0]/IVD[15:0]
S12X_EBI
MC9S12XF - Family Reference Manual, Rev.1.19
ADDR[19:16]/
IQSTAT[3:0]
DATA[15:0]
ECLKX2
LSTRB
ECLK
RW
EMULMEM
PRU
Emulator
PRR
Ports
Freescale Semiconductor
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