mc9s12xf512 Freescale Semiconductor, Inc, mc9s12xf512 Datasheet - Page 871

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mc9s12xf512

Manufacturer Part Number
mc9s12xf512
Description
S12x Microcontrollers 16-bit Automotive Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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1. Read: Anytime.
19.3.37 Port M Data Register (PTM)
Freescale Semiconductor
Function
Address 0x0250
Write: Anytime.
Altern.
Field
PTM
PTM
PTM
PTM
PTM
Reset
3-2
7
6
5
4
W
R
Port M general purpose input/output data—Data Register
Port M pin 7 is associated with the SS signal of the SPI1 module and the chip select output CS3. The SPI function
takes precedence over the chip select.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
Port M general purpose input/output data—Data Register
Port M pin 6 is associated with the SCK signal of the SPI1 module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
Port M general purpose input/output data—Data Register
Port M pin 5 is associated with the MOSI signal of the SPI1 module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
Port M general purpose input/output data—Data Register
Port M pin 4 is associated with the MISO signal of the SPI1 module and the chip select output CS2. The SPI function
takes precedence over the chip select.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
Port M general purpose input/output data—Data Register
Port M pins 3 and 2 are associated with the PMF fault inputs FAULT[3:2] and chip select outputs CS[1:0]. The PMF
function takes precedence over the chip selects. When not used with the alternative functions, these pins can be
used as general purpose I/O.
If the associated data direction bits of these pins are set to 1, a read returns the value of the port register, otherwise
the buffered pin input state is read.
PTM7
SS1
CS3
0
7
PTM6
SCK1
0
6
Table 19-33. PTM Register Field Descriptions
MC9S12XF - Family Reference Manual, Rev.1.19
Figure 19-35. Port M Data Register (PTM)
MOSI1
PTM5
0
5
MISO1
PTM4
CS2
0
4
Description
FAULT3
PTM3
CS1
3
0
Chapter 19 Port Integration Module (S12XFPIMV2)
FAULT2
PTM2
CS0
0
2
Access: User read/write
TXCAN
PTM1
0
1
RXCAN
PTM0
0
0
871
(1)

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