mc9s12xf512 Freescale Semiconductor, Inc, mc9s12xf512 Datasheet - Page 612

• Manufacturer Part Number: mc9s12xf512
• Description: S12x Microcontrollers 16-bit Automotive Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Chapter 13 FlexRay Communication Controller (FLEXRAY)
The following sequence must be executed by the application to put the protocol into the
POC:default config
13.7.6
This sections describes the message buffer search behavior for a simplified message buffer configuration.
The receive FIFO behavior is not considered in this section.
13.7.6.1
A simple message buffer configuration is a configuration that has at most one transmit message buffer and
at most one receive message buffer assigned to a slot S. The simple configuration used in this section
utilizes two message buffers, one single buffered transmit message buffer and one receive message buffer.
The transmit message buffer has the message buffer number t and has following configuration
The availability of data in the transmit buffer is indicated by the commit bit MBCCSRt[CMT] and the lock
bit MBCCSRt[LCKS].
The receive message buffer has the message buffer number r and has following configuration
612
MBCCSRt
MBCCFRt
MBFIDRt
Register
1. Repeatedly send Protocol Command FREEZE via
2. Repeatedly send Protocol Command DEFAULT_CONFIG via
until the freeze bit FRZ in
Register
the PROTSTATE field in
Message Buffer Search on Simple Message Buffer Configuration
Simple Message Buffer Configuration
CCFMSK
CCFVAL
(POCR), until the freeze bit FRZ bit in
CCFE
MCM
Field
MTM
MTD
MBT
CHA
CHB
FID
state.
000011
000000
Value
Table 13-117. Transmit Buffer Configuration
MC9S12XF - Family Reference Manual, Rev.1.19
S
0
1
0
1
0
1
-
Protocol Status Register 0 (PSR0)
Protocol Status Register 1 (PSR1)
used only for double buffers
single transmit buffer
transmit buffer
event transition mode
assigned to channel A
not assigned to channel B
cycle counter filter enabled
cycle set = {4n} = {0,4,8,12,...}
assigned to slot S
Protocol Status Register 1 (PSR1)
Protocol Operation Control Register
Description
is set to
is set.
Protocol Operation Control
POC:default
Freescale Semiconductor
config.
is cleared and
(POCR),