mc9s12xf512 Freescale Semiconductor, Inc, mc9s12xf512 Datasheet - Page 911

• Manufacturer Part Number: mc9s12xf512
• Description: S12x Microcontrollers 16-bit Automotive Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Read and write anytime.
20.3.2.4
Read and write anytime.
Freescale Semiconductor
Address: $0003
VLMODE
MSK[5:0]
PMFFRZ
PMFWAI
Reset
Field
Field
5–0
4–3
7
6
W
R
PMFWAI
Mask PWMx
0 PWMx is unmasked.
1 PWMx is masked and the channel is set to a value of 0 percent duty cycle.
where x is 0, 1, 2, 3, 4, and 5
PMF Stops While in WAIT Mode — When set to zero, the PWM generators will continue to run while the chip
is in WAIT mode. In this mode, the peripheral clock continues to run but the CPU clock does not. If the device
enters WAIT mode and this bit is one, then the PWM outputs will be switched to their inactive state until WAIT
mode is exited. At that point the PWM pins will resume operation as programmed in the PWM registers.
0 PMF continues to run in WAIT mode.
1 PMF is disabled in WAIT mode.
PMF Stops While in FREEZE Mode — When set to zero, the PWM generators will continue to run while the
chip is in FREEZE mode. If the device enters FREEZE mode and this bit is one, then the PWM outputs will be
switched to their inactive state until FREEZE mode is exited. At that point the PWM pins will resume operation
as programmed in the PWM registers.
0 PMF continues to run in FREEZE mode.
1 PMF is disabled in FREEZE mode.
Value Register Load Mode — This field determines the way the value registers are being loaded. This field can
only be written if ENHA is set.
00
01
10
11
PMF Configure 3 Register (PMFCFG3)
0
7
When using the TOPNEG/BOTNEG bits and the MSKx bits at the same
time, when in complementary mode, it is possible to have both PMF channel
outputs of a channel pair set to one.
Each value register is accessed independently
Writing to value register zero also writes to value registers one to five
Writing to value register zero also writes to value registers one to three
Reserved (defaults to independent access)
= Unimplemented or Reserved
PMFFRZ
0
6
Figure 20-7. PMF Configure 3 Register (PMFCFG3)
MC9S12XF - Family Reference Manual, Rev.1.19
Table 20-4. PMFCFG2 Field Descriptions
Table 20-5. PMFCFG3 Field Descriptions
0
0
5
Chapter 20 Pulse Width Modulator with Fault Protection (PMF15B6C) Module
CAUTION
0
4
VLMODE
Description
Description
0
3
SWAPC
0
2
SWAPB
0
1
SWAPA
0
0
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