mc9s12xf512 Freescale Semiconductor, Inc, mc9s12xf512 Datasheet - Page 1025

• Manufacturer Part Number: mc9s12xf512
• Description: S12x Microcontrollers 16-bit Automotive Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

22.4.0.12 PIT Input Trigger Control Register (PITTRIGCTL)
Read: Anytime
Write: Anytime
22.4.0.13 PIT Input Trigger Status Register (PITTRIGSTAT)
Read: Anytime
Freescale Semiconductor
Module Base + 0x002A
Module Base + 0x002B
PITTRIGSRC
PITTRIGIE
PITTRIG-
Reset
Reset
EDGE
Field
[1:0]
[1:0]
5:4
1:0
7
W
W
R
R
PITTRIGIE
PITTRIGIF
PIT Input Trigger Interrupt Enable — This bit enables an interrupt service request whenever the input trigger
flag (PITTRIGIF) is set. When the interrupt flag is already set, setting the PITTRIGIE bit will immediately cause
an interrupt. To avoid this, the interrupt flag (PITTRIGIF) has to be cleared first.
0 PIT input trigger interrupt is disabled.
1 PIT input trigger interrupt is enabled.
PIT Input Trigger Edge Select — These bits select one of 3 possible kinds of events on the PIT trigger input
to be used to generate an input trigger event. If the selected kind of event occurs on the selected trigger input
an input trigger event is generated for PIT channels configured to be externally triggered, i.e. for channels which
have the associated PITTRIGE bit set in the input trigger channel enable register (PITTRIGE). Also, on an input
trigger event, the input trigger interrupt flag (PITTRIGIF) is set.
00 a rising edge on the selected trigger input causes a trigger event to be generated
01 a falling edge on the selected trigger input causes a trigger event to generated
10 both a rising or a falling edge on the selected trigger input cause a trigger event to be generated
11 same as ‘10’
PIT Input Trigger Source Select — These bits select one of the four possible PIT input trigger sources. The
selected input trigger source is used to generate an input trigger event for PIT channels configured to be
externally triggered, i.e. for channels which have the associated PITTRIGE bit set in the input trigger channel
enable register (PITTRIGE). Also, on an input trigger event, the input trigger interrupt flag (PITTRIGIF) is set.
00 source 0 is selected
01 source 1 is selected
10 source 2 is selected
11 source 3 is selected
0
0
7
7
Figure 22-29. PIT Input Trigger Control Register (PITTRIGCTL)
Figure 22-30. PIT Input Trigger Status Register (PITTRIGSTAT)
0
0
0
0
6
6
Table 22-12. PITTRIGCTL Field Descriptions
MC9S12XF - Family Reference Manual, Rev.1.19
PITTRIGEDGE[1:0]
0
0
0
5
5
Chapter 22 Enhanced Programmable Interrupt Timer (S12XEPIT24B8CV1)
0
0
0
4
4
Description
0
0
0
0
3
3
0
0
0
0
2
2
PITTRIGSRC[1:0]
0
0
0
1
1
0
0
0
0
0
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