dp83630sqx National Semiconductor Corporation, dp83630sqx Datasheet - Page 93

• Manufacturer Part Number: dp83630sqx
• Description: Precision Phyter - Ieee 1588 Precision Time Protocol Transceiver
• Manufacturer: National Semiconductor Corporation

15:13
12:11
15:8
10:8
Bit
7:0
Bit
14.6.4 PTP Transmit Configuration Register 1 (PTP_TXCFG1), Page 5
This register provides data and mask fields to filter the first byte in a PTP Message. This function will be disabled if all the mask
bits are set to 0.
14.6.5 PHY Status Frame Configuration Register 0 (PSF_CFG0), Page 5
This register provides configuration for the PHY Status Frame function.
7
6
5
4
3
2
1
0
MAC_SRC_ADD
PSF_RXTS_EN
PSF_EVNT_EN
PSF_TXTS_EN
PSF_TRIG_EN
BYTE0_MASK
PSF_ERR_EN
PSF_PCF_RD
BYTE0_DATA
PSF_ENDIAN
RESERVED
PSF_IPV4
MIN_PRE
Bit Name
Bit Name
TABLE 67. PHY Status Frame Configuration Register 0 (PSF_CFG0), address 0x18
TABLE 66. PTP Transmit Configuration Register 1 (PTP_TXCFG1), address 0x17
0000 0000, RW
0000 0000, RW
000, RW
000, RO
0 0, RW
Default
Default
0, RW
0, RW
0, RW
0, RW
0, RW
0, RW
0, RW
0, RW
Byte0 Data:
Bit mask to be used for matching Byte0 of the PTP Message. A one in any bit
enables matching for the associated data bit. If no matching is required, all bits of
the mask should be set to 0.
Byte0 Mask:
Data to be used for matching Byte0 of the PTP Message.
Reserved: Writes ignored, Read as 0
PHY Status Frame Mac Source Address:
Selects source address as follows:
00 : Use Mac Address [08 00 17 0B 6B 0F]
01 : Use Mac Address [08 00 17 00 00 00]
10 : Use Mac Multicast Dest Address
11 : Use Mac Address [00 00 00 00 00 00]
PHY Status Frame Minimum Preamble:
Determines the minimum preamble bytes required for sending packets on the MII
interface. It is recommended that this be set to the smallest value the MAC will
tolerate.
PHY Status Frame Endian Control:
For each 16-bit field in a Status Message, the data will normally be presented in
network byte order (Most significant byte first). If this bit is set to a 1, the byte data
fields will be reversed so that the least significant byte is first.
PHY Status Frame IPv4 Enable:
This bit controls the type of packet used for PHY Status Frames.
0 = Layer2 Ethernet packets
1 = IPv4 packets.
PHY Control Frame Read PHY Status Frame Enable:
Enable PHY Status Frame delivery of PHY Control Frame read data. Data read
via a PHY Control Frame will be returned in a PHY Status Frame.
PSF Error PHY Status Frame Enable:
Enable PHY Status Frame delivery of PHY Status Frame Errors. This bit will not
independently enable PHY Status Frame operation. One of the other enable bits
must be set for PHY Status Frames to be generated.
Transmit Timestamp PHY Status Frame Enable:
Enable PHY Status Frame delivery of Transmit Timestamps.
Receive Timestamp PHY Status Frame Enable:
Enable PHY Status Frame delivery of Receive Timestamps.
Trigger PHY Status Frame Enable:
Enable PHY Status Frame delivery of Trigger Status.
Event PHY Status Frame Enable:
Enable PHY Status Frame delivery of Event Timestamps.
93
Description
Description
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