dp83630sqx National Semiconductor Corporation, dp83630sqx Datasheet - Page 57

• Manufacturer Part Number: dp83630sqx
• Description: Precision Phyter - Ieee 1588 Precision Time Protocol Transceiver
• Manufacturer: National Semiconductor Corporation

Bit
15
14
13
12
11
10
9
14.1.12 MII Interrupt Status and Event Control Register (MISR)
This register contains event status and enables for the interrupt function. If an event has occurred since the last read of this register,
the corresponding status bit will be set. If the corresponding enable bit in the register is set, an interrupt will be generated if the
event occurs. The MICR register controls must also be set to allow interrupts. The status indications in this register will be set even
if the interrupt is not enabled.
SPD_DUP_INT
LINK_INT
Bit Name
DUP_INT
ANC_INT
SPD_INT
PTP_INT
FHF_INT
CTR_INT
ED_INT
LQ_INT
or
or
or
TABLE 25. MII Interrupt Status and Event Control Register (MISR), address 0x12
0, RO/COR
0, RO/COR
0, RO/COR
0, RO/COR
0, RO/COR
0, RO/COR
0, RO/COR
Default
Link Quality Interrupt:
1 = Link Quality interrupt is pending and is cleared by the current read.
0 = No Link Quality interrupt pending.
Energy Detect Interrupt:
1 = Energy detect interrupt is pending and is cleared by the current read.
0 = No energy detect interrupt pending.
Change of Link Status Interrupt:
1 = Change of link status interrupt is pending and is cleared by the current read.
0 = No change of link status interrupt pending.
Change of Speed Status Interrupt:
Change of speed status interrupt. This function is selected if MICR[3] is set to 0.
1 = Speed status change interrupt is pending and is cleared by the current read.
0 = No speed status change interrupt pending.
Change of Speed/Duplex Interrupt:
Change of speed or duplex status interrupt. This function is selected if MICR[3]
is set to 1.
1 = Speed/duplex status change interrupt is pending and is cleared by the current
read.
0 = No speed/duplex status change interrupt pending.
Change of Duplex Status Interrupt:
Change of duplex status interrupt. This function is selected if MICR[3] is set to 0.
1 = Duplex status change interrupt is pending and is cleared by the current read.
0 = No duplex status change interrupt pending.
PTP Interrupt:
PTP interrupt. This function is selected if MICR[3] is set to 1. PTP interrupt status
should be read from the PTP_STS register. This interrupt will not be rearmed until
the PTP_STS register indicates no further PTP status is available.
1 = PTP interrupt is pending and is cleared by the current read.
0 = No PTP interrupt pending.
Auto-Negotiation Complete Interrupt:
1 = Auto-negotiation complete interrupt is pending and is cleared by the current
read.
0 = No Auto-negotiation complete interrupt pending.
False Carrier Counter Half-Full Interrupt:
False carrier counter half-full interrupt. This function is selected if the PHYCR2
[8:7] are both 0.
1 = False carrier counter half-full interrupt is pending and is cleared by the current
read.
0 = No false carrier counter half-full interrupt pending.
CTR Interrupt:
False carrier or Receive Error counter half-full interrupt. This function is selected
if either of PHYCR2[8:7] are set.
1 = False carrier or receive error counter half-full interrupt is pending and is
cleared by the current read.
0 = No false carrier or receive error counter half-full interrupt pending.
57
Description
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