dp83630sqx National Semiconductor Corporation, dp83630sqx Datasheet - Page 92

• Manufacturer Part Number: dp83630sqx
• Description: Precision Phyter - Ieee 1588 Precision Time Protocol Transceiver
• Manufacturer: National Semiconductor Corporation

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14.6.3 PTP Transmit Configuration Register 0 (PTP_TXCFG0), Page 5
This register provides configuration for IEEE 1588 Transmit Timestamp operation.
9
8
7
6
5
0
IGNORE_2STEP
SYNC_1STEP
TX_PTP_VER
CRC_1STEP
TX_IPV6_EN
TX_IPV4_EN
NTP_TS_EN
CHK_1STEP
DR_INSERT
RESERVED
IP1588_EN
TX_TS_EN
TX_L2_EN
Bit Name
TABLE 65. PTP Transmit Configuration Register 0 (PTP_TXCFG0), address 0x16
0 000, RW
Default
0, RW
0, RW
0, RW
0, RW
0, RW
0, RW
0, RW
0, RW
0, RW
0, RW
0, RW
0, RO
Sync Message One-Step Enable:
Enable automatic insertion of timestamp into transmit Sync Messages. Device will
automatically parse message and insert the timestamp in the correct location.
UPD checksum and CRC fields will be regenerated.
Reserved: Writes ignored, Read as 0
Insert Delay_Req Timestamp in Delay_Resp:
If this bit is set to a 1, the device insert the timestamp for transmitted Delay_Req
messages into inbound Delay_Resp messages. The most recent timestamp will
be used for any inbound Delay_Resp message. The receive timestamp insertion
logic must be enabled through the PTP Receive Configuration Registers.
Enable Timestamping of NTP Packets:
If this bit is set to 0, the device will check the UDP protocol field for a PTP Event
message (value 319). If this bit is set to 1, the device will check the UDP protocol
field for an NTP message (value 123). This setting applies to the transmit and
receive packet parsing engines.
Ignore Two_Step flag for One-Step operation:
If this bit is set to a 0, the device will not insert a timestamp if the Two_Step bit is
set in the flags field of the PTP header. If this bit is set to 1, the device will insert
a timestamp independent of the setting of the Two_Step flag.
Disable checking of CRC for One-Step operation:
If this bit is set to a 0, the device will force a CRC error for One-Step operation if
the incoming frame has a CRC error. If this bit is set to a 1, the device will send
the One- Step frame with a valid CRC, even if the incoming CRC is invalid.
Enable UDP Checksum correction for One-Step Operation:
Enables correction of the UDP checksum for messages which include insertion
of the timestamp. The checksum is corrected by modifying the last two bytes of
the UDP data. The last two bytes must be transmitted by the MAC as 0’s. This
control must be set for proper IPv6/UDP One-Step operation. This control will
have no effect for Layer2 Ethernet messages.
Enable IEEE 1588 defined IP address filter:
Enable filtering of UDP/IP Event messages using the IANA assigned IP
Destination addresses. If this bit is set to 1, packets with IP Destination addresses
which do not match the IANA assigned addresses will not be timestamped. This
field affects operation for both IPv4 and IPv6. If this field is set to 0, IP destination
addresses will be ignored.
Layer2 Timestamp Enable:
Enables detection of IEEE 802.3/Ethernet encapsulated PTP event messages.
IPv6 Timestamp Enable:
Enables detection of UDP/IPv6 encapsulated PTP event messages.
IPv4 Timestamp Enable:
Enables detection of UDP/IPv4 encapsulated PTP event messages.
PTP Version:
Enable Timestamp capture for a specific version of the IEEE 1588 specification.
This field may be programmed to any value between 1 and 15 and allows support
for future versions of the IEEE 1588 specification. A value of 0 will disable version
checking (not recommended).
Transmit Timestamp Enable:
Enable Timestamp capture for Transmit.
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Description