dp83630sqx National Semiconductor Corporation, dp83630sqx Datasheet - Page 90

• Manufacturer Part Number: dp83630sqx
• Description: Precision Phyter - Ieee 1588 Precision Time Protocol Transceiver
• Manufacturer: National Semiconductor Corporation

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11:8
Bit
6:4
3:1
15
14
13
12
14.6 PTP 1588 CONFIGURATION REGISTERS - PAGE 5
Page 5 PTP 1588 Configuration Registers are accessible by setting bits [2:0] = 101 of PAGESEL (13h).
14.6.1 PTP Trigger Configuration Register (PTP_TRIG), Page 5
This register provides basic configuration for IEEE 1588 Triggers. To write configuration to a Trigger, set the TRIG_WR bit along
with the TRIG_SEL and other control information. To read configuration from a Trigger, set the TRIG_SEL encoding to the Trigger
desired, and set the TRIG_WR bit to 0. The subsequent read of the PTP_TRIG register will return the configuration information.
7
0
TRIG_TOGGLE
TRIG_IF_LATE
TRIG_NOTIFY
TRIG_PULSE
RESERVED
TRIG_CSEL
TRIG_GPIO
TRIG_PER
TRIG_WR
Bit Name
TABLE 63. PTP Trigger Configuration Register (PTP_TRIG), address 0x14
0000, RW
0, RW/SC
000, RW
000, RO
Default
0, RW
0, RW
0, RW
0, RW
0, RW
Trigger Pulse:
Setting this bit will cause the Trigger to generate a Pulse rather than a single rising
or falling edge.
Trigger Periodic:
Setting this bit will cause the Trigger to generate a periodic signal. If this bit is 0,
the Trigger will generate a single Pulse or Edge depending on the Trigger Control
settings.
Trigger-if-late Control:
Setting this bit will allow an immediate Trigger in the event the Trigger is
programmed to a time value which is less than the current time. This provides a
mechanism for generating an immediate trigger or to immediately begin
generating a periodic signal. For a periodic signal, no notification be generated if
this bit is set and a Late Trigger occurs.
Trigger Notification Enable:
Setting this bit will enable Trigger status to be reported on completion of a Trigger
or on an error detection due to late trigger. If Trigger interrupts are enabled, the
notification will also result in an interrupt being generated.
Trigger GPIO Connection:
Setting this field to a non-zero value will connect the Trigger to the associated
GPIO pin. Valid settings for this field are 1 thru 12.
Trigger Toggle Mode Enable:
Setting this bit will put the trigger into toggle mode. In toggle mode, the initial value
will be ignored and the trigger output will be toggled at the trigger time.
Reserved: Writes ignored, Read as 0
Trigger Configuration Select:
This field selects the Trigger for configuration read or write.
Trigger Configuration Write:
Setting this bit will generate a Configuration Write to the selected Trigger. This bit
will always read back as 0.
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Description