dp83630sqx National Semiconductor Corporation, dp83630sqx Datasheet - Page 24

• Manufacturer Part Number: dp83630sqx
• Description: Precision Phyter - Ieee 1588 Precision Time Protocol Transceiver
• Manufacturer: National Semiconductor Corporation

www.national.com
9.11.3 TDR Cable Diagnostics
The DP83630 implements a Time Domain Reflectometry
(TDR) method of cable length measurement and evaluation
which can be used to evaluate a connected twisted pair cable.
The TDR implementation involves sending a pulse out on ei-
ther the Transmit or Receive conductor pair and observing the
results on either pair. By observing the types and strength of
reflections on each pair, software can determine the following:
— Cable short
— Cable open
— Distance to fault
— Identify which pair has a fault
— Pair skew
The TDR cable diagnostics works best in certain conditions.
For example, an unterminated cable provides a good reflec-
tion for measuring cable length, while a cable with an ideal
termination to an unpowered partner may provide no reflec-
tion at all.
9.11.4 TDR Pulse Generator
The TDR implementation can send two types of TDR pulses.
The first option is to send 50 ns or 100 ns link pulses from the
10 Mb Common Driver. The second option is to send pulses
from the 100 Mb Common Driver in 8 ns increments up to 56
ns in width. The 100 Mb pulses will alternate between positive
and negative pulses. The shorter pulses provide better ability
to measure short cable lengths, especially since they will limit
overlap between the transmitted pulse and a reflected pulse.
The longer pulses may provide better measurements of long
cable lengths.
In addition, if the pulse width is programmed to 0, no pulse
will be sent, but the monitor circuit will still be activated. This
allows sampling of background data to provide a baseline for
analysis.
9.11.5 TDR Pulse Monitor
The TDR function monitors data from the Analog to Digital
Converter (ADC) to detect both peak values and values above
a programmable threshold. It can be programmed to detect
maximum or minimum values. In addition, it records the time,
in 8 ns intervals, at which the peak or threshold value first
occurs.
The TDR monitor implements a timer that starts when the
pulse is transmitted. A window may be enabled to qualify in-
coming data to look for response only in a desired range. This
is especially useful for eliminating the transmitted pulse, but
also may be used to look for multiple reflections.
9.11.6 TDR Control Interface
The TDR Control Interface is implemented in the Link Diag-
nostics
(TDR_CTRL), address 16h and TDR Window (TDR_WIN),
address 17h. The following basic controls are:
•
•
The following transmit mode controls are available:
•
TDR Enable: Enable bit 15 of TDR_CTRL (16h) to allow
the TDR function. This bypasses normal operation and
gives control of the CD10 and CD100 block to the TDR
function.
TDR Send Pulse: Enable bit 11 of TDR_CTRL (16h) to
send the TDR pulse and starts the TDR Monitor
Transmit Mode: Enables use of 10 Mb Link pulses from
the 10 Mb Common Driver or data pulses from the 100 Mb
Common Driver by enabling TDR_100 Mb, bit 14 of
TDR_CRTL (16h).
Registers
-
Page
2
through
TDR
Control
24
•
•
The following receive mode controls are available:
•
•
•
9.11.7 TDR Results
The results of a TDR peak and threshold measurement are
available
(TDR_PEAK), address 18h and TDR Threshold Measure-
ment Register (TDR_THR), address 19h. The threshold mea-
surement may be a more accurate method of measuring the
length of longer cables since it provides a better indication of
the start of the received pulse, rather than the peak value.
Software utilizing the TDR function should implement an al-
gorithm to send TDR pulses and evaluate results. Multiple
runs should be used to best qualify any received pulses as
multiple reflections could exist. In addition, when monitoring
the transmitting pair, the window feature should be used to
disqualify the transmitted pulse. Multiple runs may also be
used to average the values providing more accurate results.
Actual distance measurements are dependent on the velocity
of propagation of the cable. The delay value is typically on the
order of 4.6 to 4.9 ns/m.
9.12 BIST
The DP83630 incorporates an internal Built-in Self Test
(BIST) circuit to accommodate in-circuit testing or diagnos-
tics. The BIST circuit can be utilized to test the integrity of the
transmit and receive data paths. BIST testing can be per-
formed with the part in the internal loopback mode or exter-
nally looped back using a loopback cable fixture. BIST testing
can also be performed between two directly connected
DP83630 devices.
The BIST is implemented with independent transmit and re-
ceive paths, with the transmit block generating a continuous
stream of a pseudo random sequence. The user can select a
9 bit or 15 bit pseudo random sequence from the PSR_15 bit
in the PHY Control Register (PHYCR). The received data is
compared to the generated pseudo-random data by the BIST
Linear Feedback Shift Register (LFSR) to determine the BIST
pass/fail status.
Transmit Pulse Width: Bits [10:8] of TDR_CTRL (16h)
allows sending of 0 to 7 clock width pulses. Actual pulses
are dependent on the transmit mode. If the pulse width is
set to 0, then no pulse will be sent.
Transmit Channel Select: The transmitter can send
pulses down either the transmit pair or the receive pair by
enabling bit 13 of TDR_CTRL (16h). Default value is to
select the transmit pair.
Min/Max Mode Control: Bit 7 of TDR_CTRL (16h)
controls the TDR Monitor operation. In default mode, the
monitor will detect maximum (positive) values. In Min
Mode, the monitor will detect minimum (negative) values.
Receive Channel Select: The receiver can monitor either
the transmit pair or the receive pair by enabling bit 12 of
TDR_CTRL (16h). Default value is to select the transmit
pair.
Receive Window: The receiver can monitor receive data
within a programmable window using the TDR Window
Register (TDR_WIN), address 17h. The window is
controlled by two register values: TDR Start Window, bits
[15:8] of TDR_WIN (17h) and TDR Stop Window, bits [7:0]
of TDR_WIN (17h). The TDR Start Window indicates the
first clock to start sampling. The TDR Stop Window
indicates the last clock to sample. By default, the full
window is enabled, with Start set to 0 and Stop set to 255.
The window range is in 8 ns clock increments, so the
maximum window size is 2048 ns.
in
the
TDR
Peak
Measurement
Register