gc80c520a CORERIVER Semiconductor, gc80c520a Datasheet - Page 58

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gc80c520a

Manufacturer Part Number
gc80c520a
Description
Midas1.0 Family Mask Rom/eprom/romless 8-bit Turbo Microcontrollers
Manufacturer
CORERIVER Semiconductor
Datasheet
6.2.6.5 PWM function Description
The PWM output signal drops to low level when the 8 bits of counter has the same value with the duty
data register (PWM0D/PWM1D) in 8-bit counter mode, or the lower 6-bits of counter has the same value
with the duty data register (PWM0D[5:0]/PWM1D[5:0]) in the 6-bit counter mode. In the 8-bit counter
mode, if the values in the PWM0D/PWM1D register are not zero, an overflow of the counter causes the
PWM output to rise from low level to high level. In 6-bit counter mode, if the values in the
PWM0D[5:0]/PWM1D[5:0] register are not zero, an overflow of the lower 6-bits of the counter causes the
PWM output to rise to high level. In this way, the value of the duty data register determines the duty rate
of the PWM output.
To generate the PWM output of the (2+6)-bit mode, set PWM0CON.3 or PWM1CON.3 to 0. In the mode,
pulse width of the PWM output can be lengthened according to the rule between the value of the upper 2-
bits of the PWM counter and that of the extension data register. The upper 2-bits of the PWM counter
counts the periods of the PWM output with the cycle of 4 from 1 to 4 (see Table 6-10). If, for example, the
value in the extension data register is ‘01b', the 2nd period will be one input cycle longer than the other 3
periods. If the base duty rate is 50 %, the duty rate of the 2nd period will increase approximately to 51%.
And if ‘10b’ is stored in the extension data register, all odd-numbered pulses will be one cycle longer. If
‘11h’ is stored to the extension data register, all pulses except the 4
one cycle. The PWM signal will be sent to the corresponding PWM output pin through an output buffer. In
this way, high output resolution can be obtained for high frequencies.
Table 6-10 Output "extended" values for PWM data register (PWM0D[7:6]/PWM1D[7:6])
PWM0D[7:6]/PWM1D[7:6]
00
01
10
11
Page 58 of 187
"Extended" Cycle Number
Functional Description
th
1, 2, 3
period pulse will be extended by
1, 3
2
-

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