gc80c520a CORERIVER Semiconductor, gc80c520a Datasheet - Page 26

• Manufacturer Part Number: gc80c520a
• Description: Midas1.0 Family Mask Rom/eprom/romless 8-bit Turbo Microcontrollers
• Manufacturer: CORERIVER Semiconductor

Functional Description
6.2 Peripheral Description
6.2.1 I/O Ports
The I/O ports of MiDAS1.0 family have been developed so as to maintain the compatibility with those of
the standard 80C52. So it is not necessary to modify the design of existing applications in order to replace
a standard 80C52 product by the MiDAS1.0 family. All output ports of MiDAS1.0 have the compatible
logic level and at least equal drive capability compared to those of the standard 80C52. As a result, their
logic status transitions are similar but a little different. Due to the difference, the MiDAS1.0 family can
improve speed and slew rates.
The MiDAS1.0 family provides bi-directional I/O ports. Each I/O port consists of a latch (Special Function
Register P0 through P4), an output driver, and an input buffer. Except P4, all the latches are 8-bits, byte-
addressable, and bit-addressable. The P4 latch is 4-bits and byte-addressable. A bit instruction has a
different opcode from a byte instruction.
The output drivers of Ports 0 and 2 and the input buffers of Port 0 are used for accesses to external
memory. In this application, Port 0 outputs the low byte of the external memory address, time-multiplexed
with the byte being written or read. Port 2 outputs the high byte of the external memory address when the
address is 16 bits wide. Otherwise the Port 2 pins continue to emit the P2 SFR content.
The ROMless devices of the MiDAS1.0 family use Ports 0 and 2 only for accesses to external memory.
So their Port 0 does not include a latch.
6.2.1.1 PORT 0
Port 0 is an 8-bit, open-drain, bi-directional I/O port with internal pull-up resistors. The pull-up devices are
switched on/off by the value of the SFR P0SEL. The Port 0 of the devices including internal program
memory is available as general purpose I/O. Port 0 pins that have 1s written to them float and can be
used as high-impedance inputs. If the internal pull-up resistors are switched on, Port 0 pins are pulled
high and can be used as inputs.
It may not be recommended that even a device including program memory should use its Port 0 as a
general purpose I/O port if it also accesses external memory. It is because the CPU will write FFH to the
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