gc80c520a CORERIVER Semiconductor, gc80c520a Datasheet - Page 156
gc80c520a
Manufacturer Part Number
gc80c520a
Description
Midas1.0 Family Mask Rom/eprom/romless 8-bit Turbo Microcontrollers
Manufacturer
CORERIVER Semiconductor
Datasheet
1.GC80C520A.pdf
(187 pages)
- Current page: 156 of 187
- Download datasheet (2Mb)
Instruction Set
XCHD
A, @Ri
Exchange Digit
Function:
Description:
XCHD exchanges the low-order nibble of the Accumulator (bits 3-0), generally
representing a hexadecimal or BCD digit, with that of the internal RAM location
indirectly addressed by the specified register. The high-order nibbles (bits 7-4)
of each register are not affected. No flags are affected
Example:
R0 contains the address 20h. The Accumulator holds the value 36h
(00110110b). Internal RAM location 20h holds the value 75h (01110101b). The
instruction,
XCHD A, @R0
will leave RAM location 20h holding the value 76h (01110110b) and 35h
(00110101b) in the Accumulator.
1
Bytes:
Cycles:
1
Encoding:
1
1
0
1
0
1
1
i
XCH
Operation:
↔
(A )
((Rn ))
Preliminary
3-0
3-0
Page 156 of 187
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