gc80c520a CORERIVER Semiconductor, gc80c520a Datasheet - Page 139

• Manufacturer Part Number: gc80c520a
• Description: Midas1.0 Family Mask Rom/eprom/romless 8-bit Turbo Microcontrollers
• Manufacturer: CORERIVER Semiconductor

ORL <dest-byte> <src-byte>
ORL A, Rn
ORL A, direct
Description:
Operation:
Encoding:
Encoding:
Function:
Example:
MiDAS1.0 Family
Cycles:
Cycles:
Bytes:
Bytes:
Logical-OR for byte variables
ORL performs the bitwise logical-OR operation between the indicated variables,
storing the results in the destination byte. No flags are affected.
The two operands allow six addressing mode combinations. When the
destination is the Accumulator, the source can use register, direct, register-
indirect, or immediate addressing; when the destination is a direct address, the
source can be the Accumulator or immediate data.
Note: When this instruction is used to modify an output port, the value used as
the original port data will be read from the output data latch, not the input pins.
If the Accumulator holds 0C3h (11000011b) and R0 holds 55h (01010101b)
then the instruction,
ORL A, R0
will leave the Accumulator holding the value 0D7h (11010111b).
When the destination is a directly addressed byte, the instruction can set
combinations of bits in any RAM location or hardware register. The pattern of
bits to be set is determined by a mask byte, which may be either a constant
data value in the instruction or a variable computed in the Accumulator at run-
time. The instruction,
ORL P1, # 00110010b
will set bits 5, 4, and 1 of output Port 1.
1
1
ORL
(A)
2
2
0
0
←
1
1
(A)
0
0
∨
(Rn)
0
0
1
0
1
r
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r
1
r
i
direct address