gc80c520a CORERIVER Semiconductor, gc80c520a Datasheet - Page 161

• Manufacturer Part Number: gc80c520a
• Description: Midas1.0 Family Mask Rom/eprom/romless 8-bit Turbo Microcontrollers
• Manufacturer: CORERIVER Semiconductor

Bit No.
88h
Symbol
TR1
TR0
TF1
TF0
IT1
IE1
IE0
MiDAS1.0 Family
R/W(0)
TF1
7
Function
Timer 1 Overflow Flag. This bit indicates when Timer 1 overflows its maximum count as
defined by the current mode. This bit can be cleared by software and is automatically
cleared when the CPU vectors to the Timer 1 interrupt service routine.
0: No Timer 1 overflow has been detected.
1: Timer 1 has overflowed its maximum count
Timer 1 Run Control. This bit enables/disables the operation of Timer 1. Halting this
timer will preserve the current count in TH1 and TL1.
0: Timer 1 is halted.
1: Timer 1 is enabled.
Timer 0 Overflow Flag. This bit indicates when Timer 0 overflows its maximum count as
defined by the current mode. This bit can be cleared by software and is automatically
cleared when the CPU vectors to the Timer 0 interrupt service routine.
0: No Timer 0 overflow has been detected.
1: Timer 0 has overflowed its maximum count
Timer 0 Run Control. This bit enables/disables the operation of Timer 0. Halting this
timer will preserve the current count in TH0 and TL0.
0: Timer 0 is halted.
1: Timer 0 is enabled.
Interrupt 1 Edge Detect. This bit is set when an edge/level of the type defined by IT1 is
detected. If IT1=1, this bit will remain set until cleared in software or the start of the
External Interrupt 1 service routine. If IT1=0, this bit will inversely reflect the state of
the /INT1 pin.
Interrupt 1 Type Select. This bit selects whether the /INT1 pin will detect edge or level
triggered interrupts.
0: /INT1 is level triggered.
1: /INT1 is edge triggered.
Interrupt 0 Edge Detect. This bit is set when an edge/level of the type defined by IT0 is
detected. If IT0=1, this bit will remain set until cleared in software or the start of the
External Interrupt 0 service routine. If IT0=0, this bit will inversely reflect the state of
the /INT0 pin.
R/W(0)
TR1
6
R/W(0)
TF0
5
R/W(0)
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TR0
4
R/W(0)
IE1
3
R/W(0)
IT1
2
R/W(0)
IE0
1
R/W(0)
IT0
0
TCON