gc80c520a CORERIVER Semiconductor, gc80c520a Datasheet - Page 54

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gc80c520a

Manufacturer Part Number
gc80c520a
Description
Midas1.0 Family Mask Rom/eprom/romless 8-bit Turbo Microcontrollers
Manufacturer
CORERIVER Semiconductor
Datasheet
6.2.5.5 Automatic Address Recognition
Automatic address recognition makes use of the 9
RI flag is set only if the received byte corresponds to the given or broadcast address. This hardware
feature eliminates the software overhead required for checking every received byte, and greatly reduces
the software programmer task.
In the multiprocessor communication, the address byte is distinguished from the data byte by setting its
9
the targeted slave (or slaves). All the slave processors have their SM2 bit set high when waiting for its
address byte. So they will be interrupted only by the reception of their address. By automatic address
recognition feature, only the addressed slave will be interrupted. The address was recognized by
hardware, not software.
The addressed slave clears the SM2 bit and waits for data bytes. If SM2=0, the slave will be interrupted
every time it receive a complete frame of data. The unaddressed slaves will be still waiting for their
address. If SM2 is 1, RI is set only if a valid frame is received and the received byte matches the given or
broadcast address.
The master processor can selectively communicate with a group of slaves by using a given address. The
address for each slave is formed with the SADDR and SADEN SFRs. The slave address is 8-bit value
specified in the SADDR. The SADEN is actually a mask byte for the byte value in SADDR. If a bit in
th
bit to 1. When the master processor wants to transmit data to a slave, first it sends the address byte of
Write to SBUF
Sample Times
Stop bit Gen.
[Transmit]
[Receive]
Bit Detector
RX CLOCK
TX Clock
SEND
Data
Shift
Shift
RXD
TXD
RI
TI
S1
/16 Reset
Figure 6-25 UART Mode 3 Timing
Start bit
Start bit
D0
D0
Page 54 of 187
D1
D1
th
data bit in Mode 2 and 3. In the MiDAS1.0 family, the
D2
D2
D3
D3
D4
D4
D5
D5
Functional Description
D6
D6
D7
D7
TB8
RB8
Stop bit
Stop bit

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