gc80c520a CORERIVER Semiconductor, gc80c520a Datasheet - Page 157

• Manufacturer Part Number: gc80c520a
• Description: Midas1.0 Family Mask Rom/eprom/romless 8-bit Turbo Microcontrollers
• Manufacturer: CORERIVER Semiconductor

XRL
XRL A, Rn
XRL A, direct
Description:
Operation:
Encoding:
Encoding:
<dest-byte>, <src-byte>
Function:
Example:
MiDAS1.0 Family
Cycles:
Cycles:
Bytes:
Bytes:
Logical Exclusive-OR for byte variables
XRL performs the bitwise logical ExcIusive-OR operation between the indicated
variables, storing the results in the destination. No flags are affected.
The two operands allow six addressing mode combinations. When the
destination is the Accumulator, the source can use register, direct register-
indirect, or immediate addressing; when the destination is a direct address, the
source can be the Accumulator or immediate data.
(Note: When this instruction is used to modify an output port, the value used as
the original port data will be read from the output data latch, not the input pins.)
If the Accumulator holds 0C3h (11000011b) and register 0 holds 0Aah
(10101010b) then the instruction,
XRL A, R0
will leave the Accumulator holding the value 69h (01101001b).
When the destination is a directly addressed byte this instruction can
complement combinations of bits in any RAM location or hardware register. The
pattern of bits to be complemented is then determined by a mask byte either a
constant contained in the instruction or a variable computed in the Accumulator
at run-time. The instruction,
XRL Pl, #00110001b
will complement bits 5, 4, and 0 of output Port 1.
1
1
XRL
(A)
2
2
0
0
←
1
1
(A)
1
1
⊗
(Rn)
0
0
0 1 0 1
1
r
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r
r
direct address