gc80c520a CORERIVER Semiconductor, gc80c520a Datasheet - Page 178

• Manufacturer Part Number: gc80c520a
• Description: Midas1.0 Family Mask Rom/eprom/romless 8-bit Turbo Microcontrollers
• Manufacturer: CORERIVER Semiconductor

15.34 Watchdog Control & Power Status Register (WDCON)
Bit No.
D8h
Symbol
WDIF
EPFI
POR
PFI
P
-
7
-
-
Function
Reserved.
Power-On-Reset Flag. This bit indicates whether the last reset was a power-on-reset.
This bit is set following a power-on-reset and unaffected by all other resets.
0: Last reset was from a source other than a power-on-reset.
1: Last reset was a power-on-reset.
Enable Power fail Interrupt. This bit enables/disables the ability of the internal band-gap
reference to generate a power-fail interrupt when V
While in Stop mode, both this bit and the band-gap select bit BGS (EXIF.0) must be set
to enable the power-fail interrupt.
Watchdog Interrupt Flag. This bit, in conjunction with the Watchdog timer interrupt
enable bit EWDI (EIE.4) and Enable Watchdog Timer Reset bit EWT (WDCON.1)
indicates if a watchdog timer event has occurred and what action will be taken. This bit
must be cleared in software before exiting the interrupt service routine, or another
interrupt will be generated. Setting this bit in software will generate a watchdog
interrupt if enabled.
Parity Flag. This bit is set to 1 if the modulo-2 sum of the eight bits of the accumulator is
1 (odd parity); and cleared to 0 on even parity.
0: Power-fail interrupt disabled.
1: Power-fail interrupt enabled during normal operation. Power-fail interrupt enabled in
Stop mode if BGS is set.
Power Fail Interrupt Flag. When set, this bit indicates that a power-fail interrupt has
occurred. This bit must be cleared in software before exiting the interrupt service
routine, or another interrupt will be generated. Setting this bit in software will generate
a power-fail interrupt, if enabled.
EWT
X
R/W(1)
POR
EWDI
6
X
R/W(0)
WDIF
EPFI
0
5
Result
No watchdog event has occurred.
R/W(1)
Page 178 of 187
PFI
4
R/W(0)
WDIF
3
R/W(0)
WTRF
2
CC
falls below approximately 4.0V.
Appendix B: SFR description
R/W(0)
EWT
1
R/W(0)
RWT
0
WDCON