mc68hc08qa24 Freescale Semiconductor, Inc, mc68hc08qa24 Datasheet - Page 334

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mc68hc08qa24

Manufacturer Part Number
mc68hc08qa24
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Timer Interface B (TIMB)
Technical Data
332
NOTE:
Before changing a channel function by writing to the MSxB or MSxA bit,
set the TSTOP and TRST bits in the TIMB status and control register
(TBSC).
ELSxB and ELSxA — Edge/Level Select Bits
MSxB:MSxA
When ELSxB:A = 00, this read/write bit selects the initial output level
of the TCHx pin. (See
When channel x is an input capture channel, these read/write bits
control the active edge-sensing logic on channel x.
When channel x is an output compare channel, ELSxB and ELSxA
control the channel x output behavior when an output compare
occurs.
When ELSxB and ELSxA are both clear, channel x is not connected
to port F, and pin PTFx/TCHx is available as a general-purpose I/O
pin.
ELSxB and ELSxA bits.
1 = Initial output level low
0 = Initial output level high
X0
X1
1X
1X
1X
00
00
00
01
01
01
Table 21-2
Table 21-2. Mode, Edge, and Level Selection
Timer Interface B (TIMB)
ELSxB:ELSxA
shows how ELSxB and ELSxA work. Reset clears the
00
00
01
10
11
01
10
11
01
10
11
Table
or buffered
compare
compare
or PWM
Buffered
capture
21-2.). Reset clears the MSxA bit.
Output
Output
preset
output
Mode
PWM
Input
Pin under port control; initial output
Pin under port control; initial output
Capture on rising edge only
Capture on rising or falling edge
Toggle output on compare
Clear output on compare
Set output on compare
Toggle output on compare
Clear output on compare
Set output on compare
Capture on falling edge only
level high
level low
Configuration
Freescale Semiconductor
MC68HC08QA24

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