mc68hc08qa24 Freescale Semiconductor, Inc, mc68hc08qa24 Datasheet - Page 295

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mc68hc08qa24

Manufacturer Part Number
mc68hc08qa24
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
20.4.4.1 Unbuffered PWM Signal Generation
MC68HC08QA24
Freescale Semiconductor
The value in the TIMA counter modulo registers and the selected
prescaler output determines the frequency of the PWM output. The
frequency of an 8-bit PWM signal is variable in 256 increments. Writing
$00FF (255) to the TIMA counter modulo registers produces a PWM
period of 256 times the internal bus clock period if the prescaler select
value is $000 (see
The value in the TIMA channel registers determines the pulse width of
the PWM output. The pulse width of an 8-bit PWM signal is variable in
256 increments. Writing $0080 (128) to the TIMA channel registers
produces a duty cycle of 128/256 or 50 percent.
Any output compare channel can generate unbuffered PWM pulses as
described in
unbuffered because changing the pulse width requires writing the new
pulse width value over the value currently in the TIMA channel registers.
An unsynchronized write to the TIMA channel registers to change a
pulse width value could cause incorrect operation for up to two PWM
periods. For example, writing a new value before the counter reaches
the old value but after the counter reaches the new value prevents any
compare during that PWM period. Also, using a TIMA overflow interrupt
routine to write a new, smaller pulse width value may cause the compare
to be missed. The TIMA may pass the new value before it is written.
PTEx/TCHx
OVERFLOW
20.4.4 Pulse Width Modulation
Figure 20-3. PWM Period and Pulse Width
Timer Interface A (TIMA)
PULSE
WIDTH
20.9.1 TIMA Status and Control
PERIOD
COMPARE
OUTPUT
OVERFLOW
COMPARE
OUTPUT
(PWM). The pulses are
OVERFLOW
Timer Interface A (TIMA)
Register).
Technical Data
COMPARE
OUTPUT
293

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