mc68hc08qa24 Freescale Semiconductor, Inc, mc68hc08qa24 Datasheet - Page 216

• Manufacturer Part Number: mc68hc08qa24
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Serial Communications Interface (SCI)
17.4.5 Break Characters
Technical Data
214
transmit shift register. A logic 0 start bit automatically goes into the least
significant bit (LSB) position of the transmit shift register. A logic 1 stop
bit goes into the most significant bit (MSB) position.
The SCI transmitter empty bit, SCTE in the SCI status control register
(SCS1), becomes set when the SCDR transfers a byte to the transmit
shift register. The SCTE bit indicates that the SCDR can accept new
data from the internal data bus. If the SCI transmit interrupt enable bit,
SCTI E (SCC2), is also set, the SCTE bit generates a transmitter CPU
interrupt request.
When the transmit shift register is not transmitting a character, the
PTE0/TxD pin goes to the idle condition, logic 1. If at any time software
clears the ENSCI bit in SCI control register 1 (SCC1), the transmitter and
receiver relinquish control of the port E pins.
Writing a logic 1 to the send break bit, SBK (SCC2), loads the transmit
shift register with a break character. A break character contains all logic
0s and has no start, stop, or parity bit. Break character length depends
on the M bit (SCC1). As long as SBK is at logic 1, transmitter logic
continuously loads break characters into the transmit shift register. After
software clears the SBK bit, the shift register finishes transmitting the
last break character and then transmits at least one logic 1. The
automatic logic 1 at the end of a break character guarantees the
recognition of the start bit of the next character.
The SCI recognizes a break character when a start bit is followed by
eight or nine logic 0 data bits and a logic 0 where the stop bit should be.
Receiving a break character has the following effects on SCI registers:
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Sets the framing error bit (FE) in SCS1
Sets the SCI receiver full bit (SCRF) in SCS1
Clears the SCI data register (SCDR)
Clears the R8 bit in SCC3
Sets the break flag bit (BKF) in SCS2
May set the overrun (OR), noise flag (NF), parity error (PE), or
reception-in-progress flag (RPF) bits
Serial Communications Interface (SCI)
Freescale Semiconductor
MC68HC08QA24