mc68hc08qa24 Freescale Semiconductor, Inc, mc68hc08qa24 Datasheet - Page 110

no-image

mc68hc08qa24

Manufacturer Part Number
mc68hc08qa24
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Clock Generator Module (CGM)
Technical Data
108
The operating range of the VCO is programmable for a wide range of
frequencies and for maximum immunity to external noise, including
supply and CGMXFC noise. For maximum immunity guidelines, refer to:
These application notes on electromagnetic compatibility are available
from local Freescale sales offices.) The VCO frequency is bound to a
range from roughly one-half to twice the center-of-range frequency,
f
frequency within this range. By design, f
center-of-range frequency, f
f
CGMXCLK is the PLL reference clock which runs at the crystal
frequency, f
The VCO’s output clock, CGMVCLK, running at a frequency f
back through a programmable modulo divider. The modulo divider
reduces the VCO clock by a factor, N (see
PLL). The divider’s output is the VCO feedback clock, CGMVDV,
running at a frequency equal to f
Conditions
The phase detector then compares the VCO feedback clock (CGMVDV)
with the reference clock (CGMXCLK). A correction pulse is generated
based on the phase difference between the two signals. The loop filter
then slightly alters the dc voltage on the external capacitor connected to
CGMXFC, based on the width and direction of the correction pulse. The
filter can make fast or slow corrections, depending on its mode,
described in
external capacitor and the reference frequency determines the speed of
the corrections and the stability of the PLL.
The lock detector compares the frequencies of the VCO feedback clock,
CGMVDV, and the reference clock, CGMXCLK. Therefore, the speed of
the lock detector is directly proportional to the reference frequency,
f
based on this comparison.
VRS
NOM
XCLK
. Modulating the voltage on the CGMXFC pin changes the
.
. The circuit determines the mode of the PLL and the lock condition
Designing for Electromagnetic Compatibility (EMC) with HCMOS
Microcontrollers, Freescale document order number AN1050/D
Designing for Electromagnetic Compatibility with Single-Chip
Microcontrollers, Freescale document order number AN1263
Clock Generator Module (CGM)
XCLK
for more information.
9.4.2.2 Acquisition and Tracking
,
NOM
, 4.9152 MHz times a linear factor (L) or
VCLK
/N. See
VRS
9.4.2.4 Programming the
is equal to the nominal
23.9 CGM Operating
Modes. The value of the
Freescale Semiconductor
MC68HC08QA24
VCLK
is fed

Related parts for mc68hc08qa24