mc68hc08qa24 Freescale Semiconductor, Inc, mc68hc08qa24 Datasheet - Page 310

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mc68hc08qa24

Manufacturer Part Number
mc68hc08qa24
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Timer Interface A (TIMA)
20.9.5 TIMA Channel Registers
Technical Data
308
These read/write registers contain the captured TIMA counter value of
the input capture function or the output compare value of the output
compare function. The state of the TIMA channel registers after reset is
unknown.
In input capture mode (MSxB–MSxA = 0:0), reading the high byte of the
TIMA channel x registers (TACHxH) inhibits input captures until the low
byte (TACHxL) is read.
In output compare mode (MSxB–MSxA ≠ 0:0), writing to the high byte of
the TIMA channel x registers (TACHxH) inhibits output compares until
the low byte (TACHxL) is written.
Reset:
Reset:
Reset:
Read:
Read:
Read:
Write:
Write:
Write:
Register Name and Address: TACH0H — $0027
Register Name and Address: TACH0L — $0028
Register Name and Address: TACH1H — $002A
Bit 15
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
Timer Interface A (TIMA)
Figure 20-9. TIMA Channel Registers
Bit 14
Bit 14
Bit 6
6
6
6
(TACH0H/L–TACH1H/L)
Bit 13
Bit 13
Bit 5
5
5
5
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
Bit 12
Bit 12
Bit 4
4
4
4
Bit 11
Bit 11
Bit 3
3
3
3
Bit 10
Bit 10
Bit 2
Freescale Semiconductor
2
2
2
MC68HC08QA24
Bit 9
Bit 1
Bit 9
1
1
1
Bit 0
Bit 8
Bit 0
Bit 0
Bit 0
Bit 8

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