mc68hc08qa24 Freescale Semiconductor, Inc, mc68hc08qa24 Datasheet - Page 162

no-image

mc68hc08qa24

Manufacturer Part Number
mc68hc08qa24
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Break Module (Break)
12.4.1 Flag Protection During Break Interrupts
12.4.2 CPU During Break Interrupts
12.4.3 TIM During Break Interrupts
12.4.4 COP During Break Interrupts
12.5 Break Module Registers
Technical Data
160
The system integration module (SIM) controls whether module status
bits can be cleared during the break state. The BCFE bit in the SIM break
flag control register (SBFCR) enables software to clear status bits during
the break state. (See
Break Interrupts subsection for each module.)
The CPU starts a break interrupt by:
The break interrupt begins after completion of the CPU instruction in
progress. If the break address register match occurs on the last cycle of
a CPU instruction, the break interrupt begins immediately.
A break interrupt stops the timer counter.
The COP is disabled during a break interrupt when V
on the RST pin. For V
Three registers control and monitor operation of the break module:
1. Break status and control register (BRKSCR)
2. Break address register high (BRKH)
3. Break address register low (BRKL)
Loading the instruction register with the SWI instruction
Loading the program counter with $FFFC–$FFFD
($FEFC–$FEFD in monitor mode)
Break Module (Break)
10.8.3 SIM Break Flag Control Register
HI
, see
23.5 DC Electrical
Characteristics.
Freescale Semiconductor
DD
+ V
MC68HC08QA24
HI
is present
and the

Related parts for mc68hc08qa24