mc68hc08qa24 Freescale Semiconductor, Inc, mc68hc08qa24 Datasheet - Page 168

• Manufacturer Part Number: mc68hc08qa24
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Monitor ROM (MON)
13.4.1 Entering Monitor Mode
Technical Data
166
NOTE:
Table 13-1
Enter monitor mode by either
The MCU sends a break signal (10 consecutive logic 0s) to the host
computer, indicating that it is ready to receive a command. The break
signal also provides a timing reference to allow the host to determine the
necessary baud rate.
Monitor mode uses alternate vectors for reset, SWI, and break interrupt.
The alternate vectors are in the $FE page instead of the $FF page and
allow code execution from the internal monitor firmware instead of user
code. The COP module is disabled in monitor mode as long as
V
the IRQ pin or the RST pin. (See
Module (SIM)
Holding the PTC3 pin low when entering monitor mode causes a bypass
of a divide-by-two stage at the oscillator. The CGMOUT frequency is
equal to the CGMXCLK frequency, and the OSC1 input directly
generates internal bus clocks. In this case, the OSC1 signal must have
a 50 percent duty cycle at maximum bus frequency.
DD
1. For V
V
V
•
•
V
V
DD
DD
HI
HI
+ V
(1)
(1)
Executing a software interrupt instruction (SWI) or
Applying a logic 0 and then a logic 1 to the RST pin
+
+
HI
HI
, see
(see
1
1
shows the pin conditions for entering monitor mode.
23.5 DC Electrical Characteristics
0
0
for more information on modes of operation.)
Monitor ROM (MON)
23.5 DC Electrical
1
1
Table 13-1. Mode Selection
1
0
Monitor
Monitor
Mode
Section 10. System Integration
CGMXCLK
---------------------------- -
Characteristics) is applied to either
2
CGMXCLK
CGMOUT
or
and
CGMVCLK
---------------------------- -
23.2 Maximum
Freescale Semiconductor
2
MC68HC08QA24
Frequency
CGMOUT
------------------------- -
CGMOUT
------------------------- -
Ratings.
Bus
2
2