mc68hc08qa24 Freescale Semiconductor, Inc, mc68hc08qa24 Datasheet - Page 248

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mc68hc08qa24

Manufacturer Part Number
mc68hc08qa24
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Serial Peripheral Interface (SPI)
18.5.1 Master Mode
Technical Data
246
NOTE:
SHIFT REGISTER
GENERATOR
MASTER MCU
BAUD RATE
Figure 18-3. Full-Duplex Master-Slave Connections
The SPI operates in master mode when the SPI master bit, SPMSTR
(SPCR $0010), is set.
Configure the SPI modules as master and slave before enabling them.
Enable the master SPI before enabling the slave SPI. Disable the slave
SPI before disabling the master SPI. (See
Register.)
Only a master SPI module can initiate transmissions. Software begins
the transmission from a master SPI module by writing to the SPI data
register. If the shift register is empty, the byte immediately transfers to
the shift register, setting the SPI transmitter empty bit, SPTE (SPSCR
$0011). The byte begins shifting out on the MOSI pin under the control
of the serial clock. (See
The SPR1 and SPR0 bits control the baud rate generator and determine
the speed of the shift register. (See
Register.) Through the SPSCK pin, the baud rate generator of the
master also controls the shift register of the slave peripheral.
MISO
MOSI
SPSCK
SS
Serial Peripheral Interface (SPI)
V
Figure
DD
18-3.)
SPSCK
MISO
MOSI
18.14.2 SPI Status and Control
SS
18.14.1 SPI Control
SHIFT REGISTER
SLAVE MCU
Freescale Semiconductor
MC68HC08QA24

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