mc68hc08qa24 Freescale Semiconductor, Inc, mc68hc08qa24 Datasheet - Page 308

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mc68hc08qa24

Manufacturer Part Number
mc68hc08qa24
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Timer Interface A (TIMA)
Technical Data
306
NOTE:
Before changing a channel function by writing to the MSxB or MSxA bit,
set the TSTOP and TRST bits in the TIMA status and control register
(TASC).
ELSxB and ELSxA — Edge/Level Select Bits
MSxB:MSxA
When ELSxB:A = 00, this read/write bit selects the initial output level
of the TCHx pin. (See
When channel x is an input capture channel, these read/write bits
control the active edge-sensing logic on channel x.
When channel x is an output compare channel, ELSxB and ELSxA
control the channel x output behavior when an output compare
occurs.
When ELSxB and ELSxA are both clear, channel x is not connected
to port E, and pin PTEx/TCHx is available as a general-purpose I/O
pin.
ELSxB and ELSxA bits.
1 = Initial output level low
0 = Initial output level high
X0
X1
1X
1X
1X
00
00
00
01
01
01
Table 20-2
Table 20-2. Mode, Edge, and Level Selection
Timer Interface A (TIMA)
ELSxB:ELSxA
shows how ELSxB and ELSxA work. Reset clears the
00
00
10
11
01
01
10
11
01
10
11
Table
Output preset
Input capture
or buffered
compare
compare
Buffered
20-2.). Reset clears the MSxA bit.
or PWM
Output
output
Mode
PWM
Pin under port control; initial
Pin under port control; initial
Capture on rising edge only
Capture on falling edge only
Capture on rising or falling edge
Toggle output on compare
Clear output on compare
Set output on compare
Toggle output on compare
Clear output on compare
Set output on compare
output level high
output level low
Freescale Semiconductor
Configuration
MC68HC08QA24

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