mc68hc08qa24 Freescale Semiconductor, Inc, mc68hc08qa24 Datasheet - Page 268

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mc68hc08qa24

Manufacturer Part Number
mc68hc08qa24
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Serial Peripheral Interface (SPI)
18.14 I/O Registers
18.14.1 SPI Control Register
Technical Data
266
Address:
Three registers control and monitor SPI operation:
The SPI control register:
SPRIE — SPI Receiver Interrupt Enable Bit
Reset:
Read:
Write:
This read/write bit enables CPU interrupt requests generated by the
SPRF bit. The SPRF bit is set when a byte transfers from the shift
register to the receive data register. Reset clears the SPRIE bit.
1 = SPRF CPU interrupt requests enabled
0 = SPRF CPU interrupt requests disabled
SPI control register (SPCR, $0010)
SPI status and control register (SPSCR, $0011)
SPI data register (SPDR, $0012)
Enables SPI module interrupt requests
Selects CPU interrupt requests
Configures the SPI module as master or slave
Selects serial clock polarity and phase
Configures the SPSCK, MOSI, and MISO pins as open-drain
outputs
Enables the SPI module
SPRIE
$0010
Bit 7
R
0
Serial Peripheral Interface (SPI)
Figure 18-13. SPI Control Register (SPCR)
= Reserved
R
6
0
SPMSTR
5
1
CPOL
4
0
CPHA
3
1
SPWOM
Freescale Semiconductor
2
0
MC68HC08QA24
SPE
1
0
SPTIE
Bit 0
0

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