cs5535 National Semiconductor Corporation, cs5535 Datasheet - Page 515
cs5535
Manufacturer Part Number
cs5535
Description
Geode Cs5535 Companion Multi-function South Bridge
Manufacturer
National Semiconductor Corporation
Datasheet
1.CS5535.pdf
(555 pages)
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Revision 0.8
GLCP Register Descriptions
5.20.1.3
MSR Address
Type
Reset Value
The flags are set by internal conditions. The internal conditions are enabled if the EN bit is 0. Reading the FLAG bit returns
the value; writing 1 clears the flag; writing 0 has no effect. (See Section 3.8.3 "MSR Address 2: SMI Control" on page 67 for
further SMI/ASMI generation details.)
5.20.1.4
MSR Address
Type
Reset Value
The flags are set by internal conditions. The internal conditions are enabled if the EN bit is 0. Reading the FLAG bit returns
the value; writing 1 clears the flag; writing 0 has no effect. (See Section 3.8.4 "MSR Address 3: Error Control" on page 71
for further ERR generation details.)
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63:18
15:2
Bit
17
16
1
0
GeodeLink Device SMI MSR (GLCP_GLD_MSR_SMI)
GeodeLink Device Error MSR (GLCP_GLD_MSR_ERROR)
Name
RSVD
DBG_ASMI_
FLAG
ERR_ASMI_FLAG
RSVD
DBG_ASMI_EN
ERR_ASMI_EN
51700002h
R/W
00000000_00000003h
51700003h
R/W
00000000_00000000h
RSVD
Description
Reserved. Reads as 0.
Debug ASMI Flag. If high, records that an ASMI was generated and applied to the sys-
tem, due to a debug event. Write 1 to clear; writing 0 has no effect. DBG_ASMI_EN (bit
1) must be low to enable this flag.
Error ASMI Flag. If high, records that an ASMI was generated and applied to the sys-
tem due to ERR signal. Write 1 to clear; writing 0 has no effect. ERR_ASMI_EN (bit 0)
must be low to enable this flag.
Reserved. Reads as 0.
Debug ASMI Enable. Write 0 to enable DBG_ASMI_FLAG (bit 17). Write 1 to disable
the flag and ASMI generation.
Error ASMI Enable. Write 0 to enable ERR_ASMI_FLAG (bit 16). Write 1 to disable
the flag and ASMI generation
GLCP_GLD_MSR_SMI Bit Descriptions
GLCP_GLD_MSR_SMI Register Map
(Continued)
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