cs5535 National Semiconductor Corporation, cs5535 Datasheet - Page 401
cs5535
Manufacturer Part Number
cs5535
Description
Geode Cs5535 Companion Multi-function South Bridge
Manufacturer
National Semiconductor Corporation
Datasheet
1.CS5535.pdf
(555 pages)
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Revision 0.8
DMA Register Descriptions
I/O Address
0CAh
0CCh
0CEh
00Ch
00Dh
0C0h
0C2h
0C4h
0C6h
0C8h
0D0h
0D2h
0D4h
006h
007h
008h
009h
00Ah
00Bh
00Eh
00Fh
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
WO
WO
WO
WO
WO
WO
WO
WO
WO
W
W
R
R
Table 5-53. DMA Native Registers Summary (Continued)
Width
(Bits)
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
Register Name
Slave DMA Channel 3 Memory Address
(DMA_CH3_ADDR_BYTE)
Slave DMA Channel 3 Transfer Count
(DMA_CH3_CNT_BYTE)
Slave DMA Channel [3:0] Status
(DMA_CH3:0_STS)
Slave DMA Channel [3:0] Command
(DMA_CH3:0_CMD)
Slave DMA Channel [3:0] Software Request
(DMA_CH3:0_SFT_REQ)
Slave DMA Channel [3:0] Channel Mask
(DMA_CH3:0_CHMSK)
Slave DMA Channel [3:0] Mode
(DMA_CH3:0_MODE)
Slave DMA Channel [3:0] Clear Byte Pointer
(DMA_CH3:0_CLR_PNTR)
Slave DMA Channel [3:0] Master Clear
(DMA_CH3:0_MSTR_CLR)
Slave DMA Channel [3:0] Clear Mask Register
(DMA_CH3:0_CLR_MSK)
Slave DMA Channel [3:0] Write Mask Register
(DMA_CH3:0_WR_MSK)
Master DMA Channel 4 Memory Address
(DMA_CH4_ADDR_BYTE)
Master DMA Channel 4 Transfer Count
(DMA_CH4_CNT_BYTE)
Master DMA Channel 5 Memory Address
(DMA_CH5_ADDR_BYTE)
Master DMA Channel 5 Transfer Count
(DMA_CH5_CNT_BYTE)
Master DMA Channel 6 Memory Address
(DMA_CH6_ADDR_BYTE)
Master DMA Channel 6 Transfer Count
(DMA_CH6_CNT_BYTE)
Master DMA Channel 7 Memory Address
(DMA_CH7_ADDR_BYTE)
Master DMA Channel 7 Transfer Count
(DMA_CH7_CNT_BYTE)
Master DMA Channel [7:4] Status
(DMA_CH7:4_STS)
Master DMA Channel [7:4] Command
(DMA_CH7:4_CMD)
Master DMA Channel [7:4] Software Request
(DMA_CH7:4_SFT_REQ)
Master DMA Channel [7:4] Channel Mask
(DMA_CH7:4_CHMSK)
(Continued)
401
Reset Value
00h
0Fh
00h
xxh
xxh
xxh
xxh
xxh
xxh
xxh
xxh
xxh
xxh
xxh
xxh
xxh
xxh
xxh
xxh
xxh
xxh
xxh
xxh
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