cs5535 National Semiconductor Corporation, cs5535 Datasheet - Page 253
cs5535
Manufacturer Part Number
cs5535
Description
Geode Cs5535 Companion Multi-function South Bridge
Manufacturer
National Semiconductor Corporation
Datasheet
1.CS5535.pdf
(555 pages)
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Revision 0.8
ATAC Register Descriptions
5.4.1.6
MSR Address
Type
Reset Value
This register is reserved for internal use by National and should not be written to.
49:48
47:4
Bit
3:2
1:0
GeodeLink Device Diagnostic MSR (ATAC_GLD_MSR_DIAG)
Name
IOMODEA
RSVD
PMODE1
PMODE0
51300005h
R/W
00000000_00000000h
ATAC_GLD_MSR_PM Bit Descriptions (Continued)
Description
I/O Mode A Control. These bits determine how the associated IDE inputs and outputs
behave when the PMC asserts two internal signals that are controlled by PMS I/O Off-
set 20h and 0Ch. The list of affected signals is in Table 3-12 "Sleep Driven IDE Signals"
on page 72.
00: No gating of I/O cells during a Sleep sequence (Default).
01: During a power management Sleep sequence, force inputs to their non-asserted
10: During a power management Sleep sequence, force inputs to their non-asserted
11: Immediately and unconditionally, force inputs to their not asserted state, and park
Reserved. Returns 0 on read.
Power Mode 1. Power mode for Channel 1 clock domain.
00: Disable clock gating. Clocks are always on.
01: Enable active hardware clock gating. Clock goes off whenever this module’s cir-
10: Reserved.
11: Reserved.
Power Mode 0. Power mode for Channel 0 clock domain.
00: Disable clock gating. Clocks are always on.
01: Enable active hardware clock gating. Clock goes off whenever this module’s cir-
10: Reserved.
11: Reserved.
state when PM_IN_SLPCTL is enabled.
state when PM_IN_SLPCTL is enabled, and park (force) outputs low when
PM_OUT_SLPCTL is enabled.
(force) outputs low.
cuits are not busy.
cuits are not busy.
(Continued)
253
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