FDC37C672QFP SMSC Corporation, FDC37C672QFP Datasheet - Page 137

• Manufacturer Part Number: FDC37C672QFP
• Description: ENHANCED SUPER I/O CONTROLLER WITH FAST IR
• Manufacturer: SMSC Corporation

Enhanced Super I/O Controller with Fast IR
Datasheet
SMSC FDC37C672
KRST_GA20
Default = 0x00
on Vcc POR or
Reset_Drv
SMI Enable Register
1
Default = 0x00
on Vcc POR
SMI Enable Register
2
Default = 0x00
on Vcc POR
NAME
NAME
Table 19.12 - Auxiliary I/O, Logical Device 8 [Logical Device Number = 0x08]
Table 19.11 - KYBD, Logical Device 7 [Logical Device Number = 0x07]
REG INDEX
REG INDEX
0xB4 R/W
0xB5 R/W
0xF1 -
0xFF
0xF0
R/W
KRESET and GateA20 Select
Bit[7] Polarity Select for P12
Bits[6:3] Reserved
Bit[2] Port 92 Select
Bit[1] Reserved
Bit[0] Reserved
Reserved - read as ‘0’
= 0 P12 active low (default)
= 1 P12 active high
= 0 Port 92 Disabled
= 1 Port 92 Enabled
This register is used to enable the different interrupt sources
onto the group nSMI output.
1=Enable
0=Disable
Bit[0] Reserved
Bit[1] EN_PINT
Bit[2] EN_U2INT
Bit[3] EN_U1INT
Bit[4] EN_FINT
Bit[5] Reserved
Bit[6] Reserved
Bit[7] EN_WDT
This register is used to enable the different interrupt sources
onto the group nSMI output, and the group nSMI output
onto the nSMI GPI/O pin.
Unless otherwise noted,
1=Enable
0=Disable
Bit[0] EN_MINT
Bit[1] EN_KINT
Bit[2] EN_IRINT
Bit[3] Reserved
Bit[4] EN_P12: Enable 8042 P1.2 to route internally to
nSMI. 0=Do not route to nSMI, 1=Enable routing to nSMI.
Bit[5] Reserved
Bit[6] EN_SMI_S: Enables nSMI Interrupt onto Serial IRQ.
Bit[7] EN_SMI_P: Enables nSMI Interrupt onto Parallel
Interrupt Pin IRQ10. 0=SMI pin floats, 1=Output onto nSMI
GPI/O pin.
DATASHEET
Page 137
DEFINITION
DEFINITION
Rev. 10-29-03
STATE
STATE
C
C