FDC37C672QFP SMSC Corporation, FDC37C672QFP Datasheet - Page 103

no-image

FDC37C672QFP

Manufacturer Part Number
FDC37C672QFP
Description
ENHANCED SUPER I/O CONTROLLER WITH FAST IR
Manufacturer
SMSC Corporation
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
FDC37C672QFP
Manufacturer:
SMSC
Quantity:
45
Part Number:
FDC37C672QFP
Manufacturer:
SMC
Quantity:
20 000
Enhanced Super I/O Controller with Fast IR
Datasheet
Note 13.1 Writing to the DOR or DSR does not wake up the part, however, writing any of the motor enable bits or
SMSC FDC37C672
Access to all other registers is possible without awakening the part. These registers can be accessed
during powerdown without changing the status of the part. A read from these registers will reflect the true
status as shown in the register description in the FDC description. A write to the part will result in the part
retaining the data and subsequently reflecting it when the part awakens. Accessing the part during
powerdown may cause an increase in the power consumption by the part. The part will revert back to its
low power mode when the access has been completed.
Pin Behavior
The FDC37C672 is specifically designed for portable PC systems in which power conservation is a
primary concern. This makes the behavior of the pins during powerdown very important.
The pins of the FDC37C672 can be divided into two major categories: system interface and floppy disk
drive interface. The floppy disk drive pins are disabled so that no power will be drawn through the part as
a result of any voltage applied to the pin within the part's power supply range. Most of the system
interface pins are left active to monitor system accesses that may wake up the part.
System Interface Pins
Table 12.8 gives the state of the system interface pins in the powerdown state. Pins unaffected by the
powerdown are labeled "Unchanged". Input pins are "Disabled" to prevent them from causing currents
internal to the FDC37C672 when they have indeterminate input values.
doing a software reset (via DOR or DSR reset bits) will wake up the part
BASE + ADDRESS
00H
01H
02H
03H
04H
06H
07H
07H
04H
05H
Access to these registers DOES NOT wake up the part
Table 13.1 - PC/AT and PS/2 Available Registers
Access to these registers wakes up the part
DOR (Note 13.1)
DSR (Note 13.1)
PC-AT
AVAILABLE REGISTERS
CCR
MSR
Data
DATASHEET
DIR
----
----
---
---
Page 103
PS/2 (MODEL 30)
DOR (Note 13.1)
DSR (Note 13.1)
MSR
CCR
Data
SRA
SRB
DIR
---
---
ACCESS PERMITTED
R/W
R/W
---
W
---
W
R
R
R
R
Rev. 10-29-03

Related parts for FDC37C672QFP