FDC37C672QFP SMSC Corporation, FDC37C672QFP Datasheet - Page 108

• Manufacturer Part Number: FDC37C672QFP
• Description: ENHANCED SUPER I/O CONTROLLER WITH FAST IR
• Manufacturer: SMSC Corporation

14.1.3 IRQSER Data Frame
14.1.4 Stop Cycle Control
SMSC FDC37C672
IRQSER PERIOD
Once a Start Frame has been initiated, the FDC37C672 will watch for the rising edge of the Start Pulse
and start counting IRQ/Data Frames from there. Each IRQ/Data Frame is three clocks: Sample phase,
Recovery phase, and Turn-around phase. During the Sample phase the FDC37C672 must drive the
IRQSER (SIRQ pin) low, if and only if, its last detected IRQ/Data value was low. If its detected IRQ/Data
value is high, IRQSER must be left tri-stated. During the Recovery phase the FDC37C672 must drive the
SERIRQ high, if and only if, it had driven the IRQSER low during the previous Sample Phase. During the
Turn-around Phase the FDC37C672 must tri-state the SERIRQ. The FDC37C672 will drive the IRQSER
line low at the appropriate sample point if its associated IRQ/Data line is low, regardless of which device
initiated the Start Frame.
The Sample Phase for each IRQ/Data follows the low to high transition of the Start Frame pulse by a
number of clocks equal to the IRQ/Data Frame times three, minus one. (e.g.: The IRQ5 Sample clock is
the sixth IRQ/Data Frame, (6 x 3) - 1 = 17th clock after the rising edge of the Start Pulse.)
The SIRQ data frame will now support IRQ2 from a logical device, previously IRQSER Period 3 was
reserved for use by the System Management Interrupt (nSMI). When using Period 3 for IRQ2 the user
should mask off the SMI via the SMI Enable Register. Likewise, when using Period 3 for nSMI the user
should not configure any logical devices as using IRQ2.
IRQSER Period 14 is used to transfer IRQ13. Logical devices 0 (FDC), 3 (Par Port), 4 (Ser Port 1), 5 (Ser
Port 2), 6 (RTC), and 7 (KBD) shall have IRQ13 as a choice for their primary interrupt.
Once all IRQ/Data Frames have completed the Host Controller will terminate IRQSER activity by initiating
a Stop Frame. Only the Host Controller can initiate the Stop Frame. A Stop Frame is indicated when the
IRQSER is low for two or three clocks. If the Stop Frame’s low time is two clocks then the next IRQSER
Cycle’s sampled mode is the Quiet mode; and any IRQSER device may initiate a Start Frame in the
second clock or more after the rising edge of the Stop Frame’s pulse. If the Stop Frame’s low time is three
clocks then the next IRQSER Cycle’s sampled mode is the Continuous mode; and only the Host Controller
may initiate a Start Frame in the second clock or more after the rising edge of the Stop Frame’s pulse.
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
Table 14.1 - IRQSER Sampling Periods
SIGNAL SAMPLED
nSMI/IRQ2
Not Used
DATASHEET
IRQ10
IRQ11
IRQ12
IRQ13
IRQ14
IRQ15
IRQ1
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
IRQ8
IRQ9
Page 108
# OF CLOCKS PAST START
Enhanced Super I/O Controller with Fast IR
11
14
17
20
23
26
29
32
35
38
41
44
47
2
5
8
Rev. 10-29-03
Datasheet