UPD78F0138 NEC, UPD78F0138 Datasheet - Page 427
UPD78F0138
Manufacturer Part Number
UPD78F0138
Description
(UPD78xxxx) 8-Bit Single-Chip Microcontrollers
Manufacturer
NEC
Datasheet
1.UPD78F0138.pdf
(558 pages)
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(1) Correction address registers 0 and 1 (CORAD0, CORAD1)
(2) Comparator
CORAD0
CORAD1
Symbol
These registers set the start address (correction address) of the instruction(s) to be corrected in the mask
ROM or flash memory.
The ROM correction corrects two places (max.) of the program. Addresses are set to two registers, CORAD0
and CORAD1. If only one place needs to be corrected, set the address to either of the registers.
CORAD0 and CORAD1 are set by a 16-bit memory manipulation instruction.
RESET input clears CORAD0 and CORAD1 to 0000H.
Cautions 1. Set the CORAD0 and CORAD1 when bit 1 (COREN0) and bit 3 (COREN1) of the correction
The comparator always compares the correction address value set in correction address registers 0 and 1
(CORAD0, CORAD1) with the fetch address value. When bit 1 (COREN0) or bit 3 (COREN1) of the correction
control register (CORCN) is 1 and the correction address matches the fetch address value, the correction
branch request signal (BR !F7FDH) is generated from the ROM correction circuit.
15
2. Only addresses where operation codes are stored can be set in CORAD0 and CORAD1.
3. Do not set the following addresses to CORAD0 and CORAD1.
control register (CORCN: see Figure 26-3) are 0.
• Address value in table area of table reference instruction (CALLT instruction): 0040H to
• Address value in vector table area: 0000H to 003FH
007FH
Figure 26-2. Format of Correction Address Registers 0 and 1
CHAPTER 26 ROM CORRECTION
User’s Manual U16228EJ2V0UD
0
FF3AH/FF3BH
FF38H/FF39H
Address
After reset
0000H
0000H
R/W
R/W
R/W
427
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