UPD78F0138 NEC, UPD78F0138 Datasheet - Page 238
UPD78F0138
Manufacturer Part Number
UPD78F0138
Description
(UPD78xxxx) 8-Bit Single-Chip Microcontrollers
Manufacturer
NEC
Datasheet
1.UPD78F0138.pdf
(558 pages)
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238
Notes 1.
Remarks 1. f
Watchdog timer clock
source
Operation after reset
Operation mode selection
Features
2.
2. f
As long as power is being supplied, Ring-OSC oscillation cannot be stopped (except in the reset
period).
The conditions under which clock supply to the watchdog timer is stopped differ depending on the
clock source of the watchdog timer.
<1> If the clock source is f
<2> If the clock source is f
R
XP
: Ring-OSC clock oscillation frequency
: X1 input clock oscillation frequency
conditions.
• When f
• In HALT/STOP mode
• During oscillation stabilization time
conditions.
• If the CPU clock is f
• In HALT/STOP mode
Table 10-2. Mask Option Setting and Watchdog Timer Operation Mode
XP
Fixed to f
Operation starts with the maximum interval
(f
The interval can be changed only once.
The watchdog timer cannot be stopped.
R
is stopped
/2
18
).
Ring-OSC Cannot Be Stopped
R
Note 1
CHAPTER 10 WATCHDOG TIMER
XP
.
XP
R
and if f
, clock supply to the watchdog timer is stopped under the following
User’s Manual U16228EJ2V0UD
, clock supply to the watchdog timer is stopped under the following
R
is stopped by software before execution of the STOP instruction
Mask Option
• Selectable by software (f
• When reset is released: f
Operation starts with maximum interval
(f
The clock selection/interval can be changed
only once.
The watchdog timer can be stopped in
standby mode
R
/2
Ring-OSC Can Be Stopped by Software
18
).
Note 2
.
XP
R
, f
R
or stopped)
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