UPD78F0138 NEC, UPD78F0138 Datasheet - Page 421

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UPD78F0138

Manufacturer Part Number
UPD78F0138
Description
(UPD78xxxx) 8-Bit Single-Chip Microcontrollers
Manufacturer
NEC
Datasheet

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• If supply voltage fluctuation is 50 ms or less in vicinity of LVI detection voltage
Note 1
Notes 1.
2.
No
If reset is generated again during this period, initialization processing is not started.
A flowchart is shown on the next page.
Figure 23-6. Example of Software Processing After Release of Reset (1/2)
50 ms has passed?
Change CPU clock
Check stabilization
Checking cause
(TMIFH1 = 1?)
(set to 50 ms)
of oscillation
of reset
Initialization
processing
Start timer
Reset
LVI
Yes
Note 2
CHAPTER 23 LOW-VOLTAGE DETECTOR
User’s Manual U16228EJ2V0UD
; The
;
;
;
;
;
;
The cause of reset (power-on-clear, WDT, LVI, or clock monitor)
can be identified by the RESF register.
8-bit timer H1 can operate with the Ring-OSC clock.
Source: f
(f
Check the stabilization of oscillation of the X1 input clock by using the
OSTC register.
Change the CPU clock from the Ring-OSC clock to the X1 input clock.
TMIFH1 = 1: Interrupt request is generated.
Initialization of ports
R
: Ring-OSC clock oscillation frequency)
Ring-OSC clock is set as the CPU clock when the reset signal is generated
R
(480 kHz (MAX.))/2
7
compare value 200 = 53 ms
421

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