UPD78F0138 NEC, UPD78F0138 Datasheet - Page 383

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UPD78F0138

Manufacturer Part Number
UPD78F0138
Description
(UPD78xxxx) 8-Bit Single-Chip Microcontrollers
Manufacturer
NEC
Datasheet

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(2) Oscillation stabilization time select register (OSTS)
This register is used to select the X1 oscillation stabilization wait time when STOP mode is released. The wait
time set by OSTS is valid only after STOP mode is released when the X1 input clock is selected as the CPU
clock. After STOP mode is released when the Ring-OSC clock is selected, check the oscillation stabilization time
using OSTC.
OSTS can be set by an 8-bit memory manipulation instruction.
RESET input sets OSTS to 05H.
Address: FFA4H
Symbol
OSTS
Cautions 1. If the STOP mode is entered and then released while the Ring-OSC clock is
Remarks 1. Values in parentheses are reference value for operation with f
Figure 19-2. Format of Oscillation Stabilization Time Select Register (OSTS)
OSTS2
7
0
0
0
0
1
1
After reset: 05H
Other than above
2. f
2. The wait time when STOP mode is released does not include the time after
X
OSTS1
being used as the CPU clock, set the oscillation stabilization time as follows.
The X1 oscillation stabilization time counter counts only during the oscillation
stabilization time set by OSTS. Therefore, note that only the statuses during the
oscillation stabilization time set by OSTS are set to OSTC after STOP mode has
been released.
STOP mode release until clock oscillation starts (“a” below) regardless of
whether STOP mode is released by RESET input or interrupt generation.
: X1 input clock oscillation frequency
• Desired OSTC oscillation stabilization time ≤ Oscillation stabilization time
6
0
0
1
1
0
0
set by OSTS
X1 pin voltage
waveform
R/W
CHAPTER 19 STANDBY FUNCTION
OSTS0
User’s Manual U16228EJ2V0UD
5
0
1
0
1
0
1
STOP mode release
2
2
2
2
2
Setting prohibited
11
13
14
15
16
/f
/f
/f
/f
/f
X
X
X
X
X
4
0
a
(204.8
(819.2
(1.64 ms)
(3.27 ms)
(6.55 ms)
µ
µ
s)
s)
Oscillation stabilization time selection
3
0
OSTS2
2
OSTS1
X
= 10 MHz.
1
OSTS0
0
383

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