UPD78F0138 NEC, UPD78F0138 Datasheet - Page 241
UPD78F0138
Manufacturer Part Number
UPD78F0138
Description
(UPD78xxxx) 8-Bit Single-Chip Microcontrollers
Manufacturer
NEC
Datasheet
1.UPD78F0138.pdf
(558 pages)
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(2) Watchdog timer enable register (WDTE)
Address: FF99H
Symbol
WDTE
Writing ACH to WDTE clears the watchdog timer counter and starts counting again.
This register can be set by an 8-bit memory manipulation instruction.
RESET input sets this register to 9AH.
Cautions 1. If data is written to WDTM, a wait cycle is generated. Do not write data to WDTM
Remarks 1. f
Cautions 1. If a value other than ACH is written to WDTE, an internal reset signal is generated.
7
After reset: 9AH
2. Set bits 7, 6, and 5 to 0, 1, and 1, respectively (when “Ring-OSC cannot be stopped”
3. After reset is released, WDTM can be written only once by an 8-bit memory
4. WDTM cannot be set by a 1-bit memory manipulation instruction.
2. f
3. ×: Don’t care
4. Figures in parentheses apply to operation at f
2. If a 1-bit memory manipulation instruction is executed for WDTE, an internal reset
3. The value read from WDTE is 9AH (this differs from the written value (ACH)).
Figure 10-3. Format of Watchdog Timer Enable Register (WDTE)
R
XP
when the CPU is operating on the subsystem clock and the X1 input clock is
stopped. For details, see CHAPTER 34 CAUTIONS FOR WAIT.
is selected by a mask option, other values are ignored).
manipulation instruction. If writing attempted a second time, an internal reset signal
is generated.
signal is generated.
: Ring-OSC clock oscillation frequency
: X1 input clock oscillation frequency
6
R/W
5
CHAPTER 10 WATCHDOG TIMER
User’s Manual U16228EJ2V0UD
4
3
R
= 240 kHz (TYP.), f
2
1
XP
= 10 MHz
0
241
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